公开(公告)号：US10177077B2

公开(公告)日：2019-01-08

申请号：US15671156

申请日：2017-08-08

Applicant: Powertech Technology Inc.

Inventor： Chi-Liang Pan ,  Ting-Feng Su

IPC: H01L23/482 ,  H01L23/00 ,  H01L23/31

Abstract: A chip structure including a chip and a redistribution layer is provided. The chip includes a plurality of pads. The redistribution layer includes a dielectric layer and a plurality of conductive traces. The dielectric layer is disposed on the chip and has a plurality of contact windows located above the pads. The conductive traces are located on the dielectric layer and are electrically coupled to the pads through the contact windows. At least one of the conductive traces includes a body and at least one protrusion coupled to the body, and the at least one protrusion is coupled to an area of the body other than where the contact windows are coupled to on the body.

公开(公告)号：US10276545B1

公开(公告)日：2019-04-30

申请号：US15936444

申请日：2018-03-27

Applicant: Powertech Technology Inc.

Inventor： Kun-Yung Huang ,  Chi-Liang Pan ,  Jing-Hua Cheng ,  Bin-Hui Tseng

IPC: H01L21/00 ,  H01L25/065 ,  H01L23/49 ,  H01L23/00

Abstract: A semiconductor package including a chip stack, at least one conductive wire, a first insulating encapsulant, a second insulating encapsulant, and a redistribution layer is provided, and a manufacturing method thereof is also provided. The chip stack includes semiconductor chips stacked on top of each other. Each semiconductor chip has an active surface that has at least one bonding region, and each bonding region is exposed by the chip stack. The conductive wire is correspondingly disposed on the bonding region. The first insulating encapsulant encapsulates the bonding region and the conductive wire. At least a portion of each conductive wire is exposed from the first insulating encapsulant. The second insulating encapsulant encapsulates the chip stack and the first insulating encapsulant. The first insulating encapsulant is exposed from the second insulating encapsulant. The redistribution layer is disposed on the first and second insulating encapsulant and electrically coupled to the conductive wire.

公开(公告)号：US20200312734A1

公开(公告)日：2020-10-01

申请号：US16363036

申请日：2019-03-25

Applicant: Powertech Technology Inc.

Inventor： Ting-Feng Su ,  Chi-Liang Pan

IPC: H01L23/367 ,  H01L23/28 ,  H01L23/498 ,  H01L23/00 ,  H01L21/56

Abstract: A semiconductor package with an internal heat sink has a substrate, a chip and an encapsulation. The substrate has an embedded heat sink, a first wiring surface and a second wiring surface. The embedded heat sink has a first surface and a second surface. The second wiring surface of the substrate and the second surface of the heat sink are coplanar. The chip has an active surface and a rear surface mounted on the first surface of heat sink through a thermal interface material layer and the active surface is electrically connected to the first wiring surface of the substrate. The encapsulation is formed on the first wiring surface of the substrate and the encapsulation encapsulates the chip. The heat generated from the chip is quickly transmitted to the heat sink and dissipated to air through the heat sink. Therefore, a heat dissipation performance of the semiconductor package is increased.

公开(公告)号：US20180301396A1

公开(公告)日：2018-10-18

申请号：US15671156

申请日：2017-08-08

Applicant: Powertech Technology Inc.

Inventor： Chi-Liang Pan ,  Ting-Feng Su

IPC: H01L23/482 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/4824 ,  H01L21/561 ,  H01L23/3114 ,  H01L24/04 ,  H01L24/07 ,  H01L2224/0235

Abstract: A chip structure including a chip and a redistribution layer is provided. The chip includes a plurality of pads. The redistribution layer includes a dielectric layer and a plurality of conductive traces. The dielectric layer is disposed on the chip and has a plurality of contact windows located above the pads. The conductive traces are located on the dielectric layer and are electrically coupled to the pads through the contact windows. At least one of the conductive traces includes a body and at least one protrusion coupled to the body, and the at least one protrusion is coupled to an area of the body other than where the contact windows are coupled to on the body.