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公开(公告)号:US11567843B2
公开(公告)日:2023-01-31
申请号:US16728925
申请日:2019-12-27
Applicant: Quanta Computer Inc.
Inventor: Yun-Ting Ciou , Han-Chuan Tsai
IPC: G06F11/32 , G06F11/22 , G08B5/36 , G06F9/4401
Abstract: A system and method for providing status information during a power-on self-test routine. The system includes a basic input output system operable to execute the power-on self-test routine and output the status of the power-on self-test routine. The system includes an externally visible indicator such as a server chassis identify LED. A controller is coupled to the basic input output system and the externally visible indicator. The controller is operable to receive the status from the basic input output system, and to control the externally visible indicator in response to the status received from the basic input output system.
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公开(公告)号:US12174758B2
公开(公告)日:2024-12-24
申请号:US18156251
申请日:2023-01-18
Applicant: Quanta Computer Inc.
Inventor: Han-Chuan Tsai , Wei-Hung Lin , Yen-Ping Tung , Sz-Chin Shih
IPC: G06F13/16
Abstract: A system and method for a configurable computer system architecture is disclosed. The computer system architecture includes a power distribution board including a configuration identification strapping. The architecture includes a first node having a first processor and a first baseboard management controller (BMC) coupled to the power distribution board via an internal communication channel. A second node, identical to the first node, has a second processor and a second BMC coupled to the power distribution board via the internal communication channel. The configuration identification strapping is one of a first configuration readable by the first and second BMCs with two nodes operating as independent devices, or a second configuration readable by the first and second BMCs with two nodes operating as a single device. The first BMC serves as a master BMC and the second BMC serves as a slave BMC in the second configuration.
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公开(公告)号:US11126521B2
公开(公告)日:2021-09-21
申请号:US16727603
申请日:2019-12-26
Applicant: Quanta Computer Inc.
Inventor: Yu-Hsien Liao , Han-Chuan Tsai
IPC: G06F11/00 , G06F11/273 , G06F13/36 , G06F11/22
Abstract: A system and method for providing a status indicator during a power-on self-test routine. A basic input output system is operable to execute the power-on self-test routine and output a status of the power-on self-test routine. A plurality of storage devices that each have an externally visible indicator. A controller is coupled to the basic input output system and the plurality of storage devices. The controller is operable to receive the status from the basic input output system and control the externally visible indicator of each of the storage devices in response to the status received from the basic input output system.
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