公开(公告)号：US20220093841A1

公开(公告)日：2022-03-24

申请号：US17094694

申请日：2020-11-10

Applicant: RAYTHEON BBN TECHNOLOGIES CORP.

Inventor： Graham Earle Rowlands ,  Thomas Akira Ohki ,  Guilhem Jean Antoine Ribeill ,  Minh-Hai Nguyen

IPC: H01L39/24 ,  H01L39/22 ,  G06N10/00

Abstract: A reservoir computer. In some embodiments, the reservoir computer includes a series array of Josephson junctions, a coupling impedance, and a readout circuit. In some embodiments, the series array of Josephson junctions includes a plurality of Josephson junctions, connected in series; the coupling impedance is connected in parallel with the series array of Josephson junctions; and the readout circuit is connected to at least three nodes of the series array of Josephson junctions.

公开(公告)号：US20220294452A1

公开(公告)日：2022-09-15

申请号：US17574429

申请日：2022-01-12

Applicant: RAYTHEON BBN TECHNOLOGIES, CORP.

Inventor： Andrew Phillips Wagner ,  Minh-Hai Nguyen ,  Graham Earle Rowlands ,  Guilhem Jean Antoine Ribeill

IPC: H03K19/17736 ,  G09B23/18 ,  H03K19/195

Abstract: An analog hashing system and method includes: an input port for accepting an input signal; a chaotic circuit including non-linear components and multiple chaotic attractors for generating an unpredictable output responsive to the input signal; a differential output port coupled to the chaotic circuit for producing an analog differential signal from the unpredictable output; and a clock circuit for producing a binary output, as a hash function, generated by the sign of the analog output in every clock cycle.

公开(公告)号：US11652485B2

公开(公告)日：2023-05-16

申请号：US17574429

申请日：2022-01-12

Applicant: RAYTHEON BBN TECHNOLOGIES, CORP.

Inventor： Andrew Phillips Wagner ,  Minh-Hai Nguyen ,  Graham Earle Rowlands ,  Guilhem Jean Antoine Ribeill

IPC: H04L9/00 ,  H03K19/17736 ,  G09B23/18 ,  H03K19/195

CPC classification number: H03K19/17744 ,  G09B23/183 ,  H03K19/1774 ,  H03K19/195

Abstract: An analog hashing system and method includes: an input port for accepting an input signal; a chaotic circuit including non-linear components and multiple chaotic attractors for generating an unpredictable output responsive to the input signal; a differential output port coupled to the chaotic circuit for producing an analog differential signal from the unpredictable output; and a clock circuit for producing a binary output, as a hash function, generated by the sign of the analog output in every clock cycle.

公开(公告)号：US12193338B2

公开(公告)日：2025-01-07

申请号：US17094694

申请日：2020-11-10

Applicant: RAYTHEON BBN TECHNOLOGIES CORP.

Inventor： Graham Earle Rowlands ,  Thomas Akira Ohki ,  Guilhem Jean Antoine Ribeill ,  Minh-Hai Nguyen

IPC: H10N60/01 ,  G06N3/063 ,  G06N10/00 ,  G11C11/44 ,  G11C11/54 ,  H10N60/10 ,  H10N60/12

Abstract: A reservoir computer. In some embodiments, the reservoir computer includes a series array of Josephson junctions, a coupling impedance, and a readout circuit. In some embodiments, the series array of Josephson junctions includes a plurality of Josephson junctions, connected in series; the coupling impedance is connected in parallel with the series array of Josephson junctions; and the readout circuit is connected to at least three nodes of the series array of Josephson junctions.