Abstract:
A system and a method for correcting erroneous image signals from defective photosensitive pixels utilizes an analog-to-digital converter (ADC) architecture that corrects the erroneous image signals as image signals are being converted from analog signals to digital signals. The erroneous image signals are corrected by limiting the deviation of a given analog image signal from a previously processed image signal.
Abstract:
An image sensor device is provided that has an uncovered imaging array of pixels and a covered global reference non-imaging array of pixels. The pixel samples of the global reference non-imaging array are used to remove noise from the pixel samples of the imaging array. The control signals and control lines that are used to sample the pixels of the imaging array are separate from and independent of the control signals and control lines that are used to sample the pixels of the global reference non-imaging array of pixels. For each row of pixels of the imaging array that is sampled, the same row of pixels of the global reference non-imaging array is sampled. The global reference row has no or very few offsets or variations to ensure that noise removal is performed effectively.
Abstract:
The present invention relates to a backside illuminated (BSI) imager having a plurality of layers. A plurality of pixel sensors are positioned on a first layer of a substrate. Pixel select conductors are positioned on the substrate in front of the first layer. Pixel readout conductors including a plurality of output lines, pixel power conductors, and a ground conductor are positioned on the substrate in front of the pixel select conductors. A plurality of sample and hold capacitors coupled to the pixel output lines are positioned vertically and/or horizontally on the substrate in front of the ground conductor.
Abstract:
An active pixel sensor array includes an imaging sensor subarray, a first reference subarray positioned on a first side of the imaging sensor subarray. The first reference subarray includes a first reference column line. A second reference subarray is positioned on a second side of the imaging subarray. The second reference subarray includes a second reference column line that is electrically coupled to the first reference column line to generate a common reference signal from the first and second reference subarrays. The active pixel sensor array may be a CMOS image sensor and each reference subarray may include a plurality of column lines associated with a plurality of columns of pixels.
Abstract:
A method for compensating for dark current in an image sensor array. In a representative embodiments, the method includes determining a nominal average dark current for the image sensor array, determining location of each pixel in the image sensor array, obtaining a nominal dark current associated with each pixel based on the nominal average dark current and on the location of the pixel, and subtracting the associated nominal dark current from the image signal for each pixel. At least two of the pixels have differing associated nominal dark currents. In other representative embodiments compensation values for dark currents and for differences in channel processing are determined during the same time period.
Abstract:
An image sensor device is provided that has an uncovered imaging array of pixels and a covered global reference non-imaging array of pixels. The pixel samples of the global reference non-imaging array are used to remove noise from the pixel samples of the imaging array. The control signals and control lines that are used to sample the pixels of the imaging array are separate from and independent of the control signals and control lines that are used to sample the pixels of the global reference non-imaging array of pixels. For each row of pixels of the imaging array that is sampled, the same row of pixels of the global reference non-imaging array is sampled. The global reference row has no or very few offsets or variations to ensure that noise removal is performed effectively.
Abstract:
A multistage voltage-to-current ("VI") converter for producing, in response to an input voltage, an output voltage useful for controlling a voltage-controlled oscillator ("VCO"). Preferably, the transfer function of the VI converter is such that the output clock frequency-to-input voltage transfer function (of a system including the VI converter and the VCO) is at least approximately linear over a desired output clock frequency range and has a desired slope in such range. In preferred embodiments, the multistage VI converter includes three differential amplifier stages connected in parallel. Each stage has a tail current and receives a reference voltage (the tail currents and reference voltages typically differ from stage to stage), and produces a component of a total current. The total current determines the output voltage. Optionally, bias circuitry is provided for producing nonzero output voltage in response to zero input voltage. In other embodiments, the multistage VI converter includes two stages or more than three stages connected in parallel, each stage producing a component of a total current which determines the output voltage. The number of stages, and the tail current and reference voltage (and resistor values and transistor characteristics) of each stage, are chosen to achieve a desired output voltage-to-input voltage transfer function. Another aspect of the invention is a VCO system including any embodiment of the multistage VI converter of the invention.