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公开(公告)号:US12199610B2
公开(公告)日:2025-01-14
申请号:US18531639
申请日:2023-12-06
Applicant: Renesas Electronics America Inc.
Inventor: Dong-Young Chang , Steven Ernest Finn
IPC: H03K3/017 , H03K5/156 , H03K7/08 , H03K17/687
Abstract: In an embodiment, an apparatus is disclosed that includes a duty cycle controller. The duty cycle controller includes a tuning circuit comprising a first field-effect transistor. The first field-effect transistor is configured to implement a capacitor. The duty cycle controller further includes an edge delay circuit. The edge delay circuit includes a second field-effect transistor that, when activated by an input clock signal of the duty cycle controller, is configured to connect a voltage source to an output clock signal of the duty cycle controller. The edge delay circuit further includes a third field-effect transistor that, when activated, is configured to connect the first field-effect transistor of the tuning circuit to the output clock signal.
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公开(公告)号:US11888481B2
公开(公告)日:2024-01-30
申请号:US17554652
申请日:2021-12-17
Applicant: Renesas Electronics America Inc.
Inventor: Dong-Young Chang , Steven Ernest Finn
IPC: H03K3/017 , H03K17/687 , H03K5/156 , H03K7/08
CPC classification number: H03K3/017 , H03K5/1565 , H03K7/08 , H03K17/6872
Abstract: An apparatus is disclosed that includes a duty cycle controller. The duty cycle controller includes a tuning circuit comprising a first field-effect transistor. The first field-effect transistor is configured to implement a capacitor. The duty cycle controller further includes an edge delay circuit. The edge delay circuit includes a second field-effect transistor that, when activated by an input clock signal of the duty cycle controller, is configured to connect a voltage source to an output clock signal of the duty cycle controller. The edge delay circuit further includes a third field-effect transistor that, when activated, is configured to connect the first field-effect transistor of the tuning circuit to the output clock signal.
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