公开(公告)号：US20220173744A1

公开(公告)日：2022-06-02

申请号：US17106456

申请日：2020-11-30

Applicant: Renesas Electronics America Inc.

Inventor： Soonseob LEE ,  Kwang Seok HAN ,  Jong Chan HA ,  Ilhyun CHO ,  Heewon SUH ,  Hyunbae JIN ,  You Ho LEEM ,  Seunghun LEE ,  Kwang Hoon OH

IPC: H03M1/08 ,  H03K5/24

Abstract: A hybrid comparator includes an analog signal combiner and a dynamic latch. The analog signal combiner is configured to receive an input analog signal and an input reference signal, and generate an analog output signal by combining the input analog signal and the input reference signal. The dynamic latch is configured to receive the analog output signal and a clock signal, and generate a digital output signal.