公开(公告)号：US3956737A

公开(公告)日：1976-05-11

申请号：US488201

申请日：1974-07-12

Applicant: Roger James Ball

Inventor： Roger James Ball

IPC: G06F12/04 ,  G06F12/08 ,  G06F9/08

CPC classification number: G06F12/04 ,  G06F12/0804

Abstract: A stream of data words is written into a memory, organised on the basis of multi-word blocks, by collecting consecutively occurring words having the same block address and transferring those words to the memory in parallel, only when a word with a new block address appears. This reduces the number of memory accesses required and hence permits faster operation.

Abstract translation: 通过收集具有相同块地址的连续出现的字并且将这些字并行地传送到存储器，将数据字流写入存储器中，该存储器被组织在多字块的基础上，只有当具有新的块地址的字时 出现。 这减少了所需的存储器访问数量，因此允许更快的操作。

公开(公告)号：US3949379A

公开(公告)日：1976-04-06

申请号：US488202

申请日：1974-07-12

Applicant: Roger James Ball

Inventor： Roger James Ball

IPC: G06F9/38 ,  G06F9/06 ,  G06F9/20

CPC classification number: G06F9/3824

Abstract: A stage of a pipeline data processor has a store associated with it, and when that stage requires to write data into a specified address within that store, but the data to be written is not yet available, an indication of the address is stored in a special reserved register, so as to permit subsequent accesses to the store without waiting for that data to become available. When the data eventually becomes available, it is written into the store, using the contents of the register for addressing the store. This prevents hold-ups in the pipeline and hence increases the effective rate of instruction execution.

Abstract translation: 流水线数据处理器的阶段具有与其相关联的存储，并且当该阶段需要将数据写入该存储器内的指定地址，但是要写入的数据尚不可用时，地址的指示被存储在 特殊保留寄存器，以便允许对存储的后续访问，而不等待该数据变得可用。 当数据最终变得可用时，它将被写入商店，使用寄存器的内容来寻址商店。 这可以防止流水线中的滞留，从而增加指令执行的有效率。

公开(公告)号：US3949376A

公开(公告)日：1976-04-06

申请号：US488200

申请日：1974-07-12

Applicant: Roger James Ball ,  Andrew Gibson Williams

Inventor： Roger James Ball ,  Andrew Gibson Williams

IPC: G06F9/32 ,  G06F9/38 ,  G06F12/08 ,  G06F9/06

CPC classification number: G06F9/3814 ,  G06F9/3802

Abstract: Instructions are written in multi-word blocks into an instruction buffer from a slave store, and then scanned sequentially. The instruction buffer is unequally divided, a first part of a block being written into the smaller portion of the buffer during scanning of the larger portion, and the remainder of the block being written into the larger portion during scanning of the smaller portion. Thus, more time is available for an initial write from a block, which is when delays are more likely to occur due to the block having to be fetched from main store.

Abstract translation: 指令以多字块写入从存储器的指令缓冲区，然后依次扫描。 指令缓冲器不均匀地分割，在扫描较大部分期间，块的第一部分被写入缓冲器的较小部分，并且在扫描较小部分期间块的剩余部分被写入较大部分。 因此，更多的时间可用于来自块的初始写入，这是由于由于必须从主存储器获取块而更可能发生延迟。