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公开(公告)号：US20200269780A1
公开(公告)日：2020-08-27
申请号：US16063738
申请日：2016-12-02
Applicant: ROHM CO., LTD.
Inventor： Yuji Kaneda , Yuzo Mizushima , Shogo Takamura , Isao Niwa
IPC: B60R16/023 , G01R31/327
Abstract: Provided is an integrated circuit (41) that operates in normal mode or sleep mode corresponding to the on/off state of a vehicle engine. On the basis of information of setting data information stored in an internal register (42) and information of the on/off state of the vehicle engine from an MPU (50), the integrated circuit (41) generates monitoring signals (INZ0 to INZ7), monitoring signals (INA0 to INA7), and monitoring signals (INB0 to INB5). These monitoring signals enables to monitor states of a head light switch (11), a door switch (12), and a window switch (13). As the switch state monitoring method, intermittent operation or constant monitoring operation is performed.
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2.发明授权公开(公告)号：US09406291B2
公开(公告)日：2016-08-02
申请号：US13962472
申请日：2013-08-08
Applicant: Rohm Co., Ltd.
Inventor： Isao Niwa
CPC classification number: G10K11/18 , B06B1/0215 , B06B2201/30 , G01S7/524 , G01S15/87 , G01S15/931
Abstract: A transmission circuit transmits an ultrasonic signal from an ultrasonic vibrator by driving a terminal voltage of the ultrasonic vibrator using a first pulse signal and then further driving the terminal voltage using a second pulse signal having an opposite phase to the first pulse signal. At least one of a pulse number of the second pulse signal and a pulse level of the terminal voltage is arbitrarily set.
Abstract translation: 传输电路使用第一脉冲信号驱动超声波振动器的端电压，然后使用与第一脉冲信号具有相反相位的第二脉冲信号进一步驱动终端电压，从超声波振动器发送超声信号。 第二脉冲信号的脉冲数和终端电压的脉冲电平中的至少一个被任意设定。
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公开(公告)号：US20200064168A1
公开(公告)日：2020-02-27
申请号：US16537842
申请日：2019-08-12
Applicant: Rohm Co., Ltd.
Inventor： Isao Niwa , Yuji Kaneda , Yuzo Mizushima
IPC: G01F1/66 , H03F3/45 , H01L23/495 , H03K5/24 , H03F3/68
Abstract: A semiconductor integrated circuit device includes a first terminal arranged to accept an external input of an analog input signal, an amplifier configured to amplify the analog input signal to generate an amplified signal, a logic unit configured to generate a digital output signal that is in accordance with the amplified signal, and a second terminal arranged to externally output an analog output signal that is in accordance with the amplified signal. The first terminal is disposed at a first side of a package, and the second terminal is disposed at a second side which is different from the first side.
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公开(公告)号：US20190049277A1
公开(公告)日：2019-02-14
申请号：US16054333
申请日：2018-08-03
Applicant: Rohm Co., Ltd.
Inventor： Isao Niwa
IPC: G01F1/66
CPC classification number: G01F1/667 , G01F1/662 , G01F25/0007
Abstract: A signal processing apparatus for processing a signal is provided. The apparatus includes a comparator having one input terminal to which a signal is inputted, a first switch configured to switch between application and non-application of a reference voltage, a second switch configured to switch between application and non-application of an envelope reference voltage; a third switch configured to switch between application and non-application of an error detection reference voltage; and a controller configured to perform switching control of the first switch, the second switch and the third switch based on an output of the comparator.
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5.发明申请公开(公告)号：US20170302285A1
公开(公告)日：2017-10-19
申请号：US15488676
申请日：2017-04-17
Applicant: Rohm Co., Ltd.
Inventor： Isao Niwa
CPC classification number: H03L7/099 , G11C17/08 , H03B5/32 , H03B5/36 , H03L7/146 , H03L7/181 , H03L7/183 , H03L2207/06
Abstract: The present invention is related to a clock generating device for generating an internal clock signal having a frequency correlated with a clock frequency of an external oscillator when the clock frequency of the external oscillator is not specified in advance. A clock generating device 105 comprises a memory 134 and a PLL circuit 120. The memory 134 is configured to store information about a frequency of an external clock signal generated by an external oscillator 200 at a predetermined timing. The PLL circuit 120 generates a second clock signal correlated with a first clock signal based on the information stored in the memory 134.
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Patent Agency Ranking
公开(公告)号：US10894519B2
公开(公告)日：2021-01-19
申请号：US16063738
申请日：2016-12-02
Applicant: ROHM CO., LTD.
Inventor： Yuji Kaneda , Yuzo Mizushima , Shogo Takamura , Isao Niwa
IPC: B60R16/02 , B60R16/023 , G01R31/327
Abstract: Provided is an integrated circuit (41) that operates in normal mode or sleep mode corresponding to the on/off state of a vehicle engine. On the basis of information of setting data information stored in an internal register (42) and information of the on/off state of the vehicle engine from an MPU (50), the integrated circuit (41) generates monitoring signals (INZ0 to INZ7), monitoring signals (INA0 to INA7), and monitoring signals (INB0 to INB5). These monitoring signals enables to monitor states of a head light switch (11), a door switch (12), and a window switch (13). As the switch state monitoring method, intermittent operation or constant monitoring operation is performed.
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公开(公告)号：US10816374B2
公开(公告)日：2020-10-27
申请号：US16054333
申请日：2018-08-03
Applicant: Rohm Co., Ltd.
Inventor： Isao Niwa
Abstract: A signal processing apparatus for processing a signal is provided. The apparatus includes a comparator having one input terminal to which a signal is inputted, a first switch configured to switch between application and non-application of a reference voltage, a second switch configured to switch between application and non-application of an envelope reference voltage; a third switch configured to switch between application and non-application of an error detection reference voltage; and a controller configured to perform switching control of the first switch, the second switch and the third switch based on an output of the comparator.
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公开(公告)号：US20180069169A1
公开(公告)日：2018-03-08
申请号：US15691993
申请日：2017-08-31
Applicant: Rohm Co., Ltd.
Inventor： Akihiro Ota , Yuzo Mizushima , Yuji Kaneda , Isao Niwa
CPC classification number: H01L41/1132 , G01H11/08 , H01L41/042 , H01L41/09 , H01L41/22 , H02N2/181
Abstract: A semiconductor integrated circuit constituting a part of a sensor signal processing apparatus for processing sensor signal output from a sensor includes: a first terminal where one end of a vibrator externally attached to the semiconductor integrated circuit is connected and a second terminal where the other end of the vibrator is connected; and an oscillation circuit oscillating the vibrator connected via the first and second terminals, wherein the oscillator circuit intermittently oscillating the vibrator based on control signal, wherein a first period where the oscillation circuit oscillates the vibrator and a second period where the oscillation circuit does not oscillate the vibrator are alternately switched, wherein, during the first period, potentials of the first and second terminals are alternately switched complementarily to high level and low level, and wherein, during the second period, the potentials of the first terminal and the second terminal are fixed to the low level.
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公开(公告)号：US11326917B2
公开(公告)日：2022-05-10
申请号：US16537842
申请日：2019-08-12
Applicant: Rohm Co., Ltd.
Inventor： Isao Niwa , Yuji Kaneda , Yuzo Mizushima
IPC: G01F1/667 , H01L23/495 , H03K5/24 , H03F3/68 , H03F3/45 , H03K3/03 , H01L23/00 , H03B5/36 , H03B5/24
Abstract: A semiconductor integrated circuit device includes a first terminal arranged to accept an external input of an analog input signal, an amplifier configured to amplify the analog input signal to generate an amplified signal, a logic unit configured to generate a digital output signal that is in accordance with the amplified signal, and a second terminal arranged to externally output an analog output signal that is in accordance with the amplified signal. The first terminal is disposed at a first side of a package, and the second terminal is disposed at a second side which is different from the first side.
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10.发明授权公开(公告)号：US10288686B2
公开(公告)日：2019-05-14
申请号：US15648574
申请日：2017-07-13
Applicant: Rohm Co., Ltd.
Inventor： Shogo Takamura , Isao Niwa , Yuji Kaneda , Yuzo Mizushima
IPC: G01R31/327 , H01H9/16 , G01R31/00
Abstract: A semiconductor integrated circuit for monitoring a switch, including: a first detection part that detects a state of a first switch; a second detection part that detects a state of a second switch; a sub-voltage monitoring part that monitors whether the sub-voltage is within a predetermined range; a switch monitoring part that monitors a change in a state of the first switch and a change in a state of the second switch; a setting part that determines an invalid period, during which the monitoring result of the switch monitoring part regarding the change in the state of the second switch is invalidated; and a transmission part that transmits the monitoring result of the switch monitoring part and information on the invalid period.
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