Statistical pattern recognition system with continual update of acceptance zone limits
    1.
    发明授权
    Statistical pattern recognition system with continual update of acceptance zone limits 失效
    具有连续性接受区域限制的统计图形识别系统

    公开(公告)号:US3623015A

    公开(公告)日:1971-11-23

    申请号:US3623015D

    申请日:1969-09-29

    CPC classification number: G06F17/18

    Abstract: A pattern recognition system which employs three similar addressable memories. Data representing an upper limit distribution pattern of a series of measurements on a particular parameter is stored in one memory, while data reflecting a lower limit distribution pattern of the measurements on the same parameter is contained in the second memory. Then new data reflecting additional parameter measurements is loaded into the third memory and compared with the data in the other two memories to see if this new data ''''fits'''' within the acceptance zone defined by the upper and lower limit patterns. If there is a fit, then the system emits a recognition signal which indicates that the additional parameter measurements belong to the same parameter set which established the original upper and lower limit patterns. Following this, the upper and lower limit patterns contained in the first and second memories are updated to include the new data, and then more parameter measurements are made and compared with the updated acceptance zone. This process continues with still more incoming measurement data so that the upper and lower limit patterns are continually modified to accommodate long term changes in the pattern to be recognized.

    Logarithmic clock
    2.
    发明授权
    Logarithmic clock 失效
    对数时钟

    公开(公告)号:US3588843A

    公开(公告)日:1971-06-28

    申请号:US3588843D

    申请日:1968-11-21

    CPC classification number: G04F10/04 G06F7/68 H03K3/72

    Abstract: A SYSTEM FOR GENERATING PULSES WHOSE TIMING IS SUBSTANTIALLY IN ACCORDANCE WITH A LOGARITHM OF THE ELASPED NUMBER OF LINEAR (PERIODIC) CLOCK PULSES EMPLOYS AN ACCUMULATOR AND A BACKWARD COUNTER, BOTH OF WHICH COUNT CLOCK PULSES. A COUNT DETECTOR EMITS AN OUTPUT PULSE WHENEVER THE COUNT IN THE BACKWARD COUNTER REACHES ZERO. A DATA SHIFTING NETWORK THEREUPON TRANSFERS THE CONTENTS OF THE ACCUMULATOR INTO THE BACKWARD COUNTER AND THE LATTER IMMEDIATELY RECOMMENCES COUNTING ITS CLOCK PULSES UNTIL IT REACHES ZERO AGAIN, WHILE THE ACCUMULATOR CONTINUES COUNTING UPWARDLY. THUS, THE DETECTOR EMITS A TRAIN OF OUTPUT PULSES WHOSE SPACING INCREASES EXPONENTIALLY.

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