公开(公告)号：US20160337229A1

公开(公告)日：2016-11-17

申请号：US15220189

申请日：2016-07-26

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： Martin M. Deneroff ,  Gregory M. Thorson ,  Randal S. Passint

IPC: H04L12/721 ,  H04L29/08

CPC classification number: G06F15/17312 ,  G06F15/17343 ,  G06F15/17381 ,  H04L45/14 ,  H04L67/1002

Abstract: A system and method for interconnecting a plurality of processing element nodes within a scalable multiprocessor system is provided. Each processing element node includes at least one processor and memory. A scalable interconnect network includes physical communication links interconnecting the processing element nodes in a cluster. A first set of routers in the scalable interconnect network route messages between the plurality of processing element nodes. One or more metarouters in the scalable interconnect network route messages between the first set of routers so that each one of the routers in a first cluster is connected to all other clusters through one or more metarouters.