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公开(公告)号：US20250107078A1
公开(公告)日：2025-03-27
申请号：US18392243
申请日：2023-12-21
Applicant: SK hynix Inc.
Inventor： Seok Min CHOI , Jeong Hwan KIM , Jung Shik JANG , Rho Gyu KWAK , In Su PARK , Na Yeong YANG , Won Geun CHOI , Jung Dal CHOI
Abstract: A semiconductor device may include a gate structure including stacked local lines and a multi-step structure, wherein the multi-step structure defines pads of the local lines, channel patterns respectively disposed over the pads, a block word line disposed over the channel patterns and extending along a profile of the multi-step structure, and first contact plugs passing through the channel patterns and respectively connecting the channel patterns and the local lines.
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公开(公告)号：US20250056796A1
公开(公告)日：2025-02-13
申请号：US18519680
申请日：2023-11-27
Applicant: SK hynix Inc.
Inventor： Won Geun CHOI , Jeong Hwan KIM , Jung Shik JANG
Abstract: The present technology includes a memory device and a method of manufacturing the memory device. The memory device includes a memory block in which first and second connection regions and a cell region between the first and second connection regions are designated, a word line included in the memory block, a first drain selection line included in the memory block and positioned on the word line, a first drain contact contacting the first drain selection line of the first connection region, a second drain contact contacting the first drain selection line of the second connection region, and a first drain voltage supply line commonly contacting the first and second drain contacts.
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公开(公告)号：US20240292617A1
公开(公告)日：2024-08-29
申请号：US18538555
申请日：2023-12-13
Applicant: SK hynix Inc.
Inventor： Won Geun CHOI , In Su PARK , Jung Shik JANG
Abstract: There are provided a semiconductor memory device and a manufacturing method of a semiconductor memory device. The semiconductor memory device includes a gate stack structure, a channel structure passing through the gate stack structure, and a memory layer between the channel structure and the gate stack structure. A channel layer or a channel pattern, which constitutes the channel structure, includes a structure having a corner or includes a filling type structure and a liner type structure.
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公开(公告)号：US20240284671A1
公开(公告)日：2024-08-22
申请号：US18337232
申请日：2023-06-19
Applicant: SK hynix Inc.
Inventor： Won Geun CHOI , Rho Gyu KWAK , In Su PARK , Jung Shik JANG , Jung Dal CHOI
Abstract: A semiconductor device includes a gate structure including conductive layers and insulating layers that are alternately stacked. The semiconductor device also includes an insulating core located in the gate structure and including a long axis and a short axis. The semiconductor device further includes a first channel pattern and a second channel pattern surrounding the insulating core and located to face each other along the long axis. The semiconductor device additionally includes a barrier pattern surrounding the first channel pattern and the second channel pattern and having different thicknesses along the long axis and the short axis.
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公开(公告)号：US20240276722A1
公开(公告)日：2024-08-15
申请号：US18448599
申请日：2023-08-11
Applicant: SK hynix Inc.
Inventor： Won Geun CHOI , Mi Seong PARK , In Su PARK , Jung Shik JANG , Jung Dal CHOI
Abstract: There are provided a semiconductor memory device and a manufacturing method of a semiconductor memory device. The semiconductor memory device includes: a plurality of conductive layers stacked to be spaced apart from each other in a first direction; a channel hole extending in the first direction to penetrate the plurality of conductive layers; two or more channel patterns disposed to be spaced apart from each other along a sidewall of the channel hole; and two or more memory patterns disposed to be spaced apart from each other between the sidewall of the channel hole and the two or more channel patterns, respectively.
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Patent Agency Ranking
公开(公告)号：US20250096152A1
公开(公告)日：2025-03-20
申请号：US18393132
申请日：2023-12-21
Applicant: SK hynix Inc.
Inventor： Rho Gyu KWAK , In Su PARK , Jung Shik JANG , Seok Min CHOI , Won Geun CHOI
Abstract: A semiconductor device may include a source structure, a support structure positioned on the source structure and including a first inclined surface extending in a second direction crossing the first direction, a gate structure positioned on the source structure and the support structure and including conductive layers and insulating layers alternately stacked, channel structures extending through the gate structure and connected to the source structure, and a slit structure extending in the first direction through the gate structure, wherein each of the conductive layers includes a second inclined surface extending in the second direction.
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公开(公告)号：US20250071995A1
公开(公告)日：2025-02-27
申请号：US18943125
申请日：2024-11-11
Applicant: SK hynix Inc.
Inventor： Won Geun CHOI , Jung Shik JANG , Jang Won KIM , Mi Seong PARK
Abstract: There are provided a memory device and a manufacturing method of the memory device. The memory device includes: a first gate stack structure and a second gate stack structure, disposed on a substrate; and a slit disposed between the first gate stack structure and the second gate stack structure to electrically isolate the first gate stack structure and the second gate stack structure from each other.
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公开(公告)号：US20250071989A1
公开(公告)日：2025-02-27
申请号：US18534744
申请日：2023-12-11
Applicant: SK hynix Inc.
Inventor： Seok Min CHOI , Jung Shik JANG , Rho Gyu KWAK , In Su PARK , Won Geun CHOI , Jung Dal CHOI
Abstract: The present technology relates to a semiconductor memory device and a method of manufacturing the same. The semiconductor memory device includes a first stack structure, a plurality of first slits passing through the first stack structure in a vertical direction and extending in a first horizontal direction orthogonal to the vertical direction, a first source line layer contacting an a top portion of the first stack structure, a second source line layer directly contacting the first source line layer, a second stack structure contacting the second source line layer and overlapping with the first stack structure in the vertical direction, and a plurality of second slits passing through the second stack structure in the vertical direction and extending in a second horizontal direction orthogonal to the vertical direction.
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公开(公告)号：US20250008733A1
公开(公告)日：2025-01-02
申请号：US18523112
申请日：2023-11-29
Applicant: SK hynix Inc.
Inventor： Seok Min CHOI , Jung Shik JANG , Rho Gyu KWAK , Jeong Hwan KIM , In Su PARK , Won Geun CHOI
Abstract: A semiconductor device, and a method of manufacturing the same, includes a gate stack including a plurality of conductive lines extending in a first horizontal direction, a first slit and a second slit passing through the gate stack in a vertical direction and extending in the first horizontal direction, and a plurality of cell plugs extending in the vertical direction orthogonal to the first horizontal direction in the gate stack between the first slit and the second slit. Each of the first slit and the second slit includes a first portion extending in a diagonal direction between the first horizontal direction and a second horizontal direction orthogonal to the first horizontal direction, and a second portion extending in the first horizontal direction.
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公开(公告)号：US20240422972A1
公开(公告)日：2024-12-19
申请号：US18514991
申请日：2023-11-20
Applicant: SK hynix Inc.
Inventor： Won Geun CHOI , In Su PARK , Jung Shik JANG , Jung Dal CHOI
Abstract: The present disclosure relates to a semiconductor memory device. The semiconductor memory device includes a gate stack, a hole penetrating the gate stack, and a channel structure. The hole has an undercut region defined on a sidewall thereof. The channel structure covers a portion of the undercut region and opens another portion of the undercut region.
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