INTERFACE DEVICE AND RECEIVER INCLUDING THE SAME

    公开(公告)号:US20170118317A1

    公开(公告)日:2017-04-27

    申请号:US15388294

    申请日:2016-12-22

    Applicant: SOCIONEXT INC.

    Abstract: An interface device disclosed herein transmits a data signal in sync with a clock signal, and includes: a reception unit performing demodulation processing and error correction processing on an input carrier wave and outputting signals resulting from these types of processing; a transport stream (TS) packet acquisition unit acquiring a TS packet included in the outputs of the reception unit; a variable-length packet acquisition unit acquiring a variable-length packet included in the outputs of the reception unit; and a first selector selecting either the TS packet or the variable-length packet and outputting the selected packet as the data signal.

    METHOD OF TRANSMITTING A DATA SIGNAL IN SYNC WITH A CLOCK SIGNAL

    公开(公告)号:US20200304612A1

    公开(公告)日:2020-09-24

    申请号:US16896490

    申请日:2020-06-09

    Applicant: SOCIONEXT INC.

    Abstract: A method of transmitting a data signal in sync with a clock signal in a DTV receiver. The method includes performing demodulation processing and error correction processing on an input carrier wave and outputting signals resulting from these types of processing; acquiring a transport stream (TS) packet included in the signals; acquiring a variable-length packet included in the signals; and selecting either the TS packet or the variable-length packet and outputting the selected packet as the data signal, where to variable-length packet is either a type length value (TLV) packet or an Internet protocol (IP) packet.

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