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1.发明授权Semiconductor device and method of forming mold underfill using dispensing needle having same width as semiconductor die 有权半导体装置以及使用与半导体芯片相同宽度的分配针形成模具底部填充物的方法公开(公告)号：US08785251B2
公开(公告)日：2014-07-22
申请号：US14020996
申请日：2013-09-09
Applicant: STATS ChipPAC, Ltd.
Inventor： SooMoon Park , ByoungWook Jang , DongSoo Moon
IPC: H01L21/00
CPC classification number: H01L21/54 , H01L21/563 , H01L24/743 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73265 , H01L2224/83102 , H01L2224/92125 , H01L2924/01029 , H01L2924/01079 , H01L2924/01322 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/00
Abstract: A semiconductor device has a semiconductor die mounted over a surface of a substrate. A mold underfill dispensing needle has a width substantially equal to a width of the semiconductor die. The dispensing needle is placed in fluid communication with a side of the semiconductor die. A mold underfill is deposited from an outlet of the dispensing needle evenly across a width of the semiconductor die into an area between the semiconductor die and substrate without motion of the dispensing needle. The dispensing needle has a shank and the outlet in a T-configuration. The dispensing needle can have a plurality of pole portions between a shank and the outlet. The dispensing needle has a plate between a shank and the outlet. The outlet has an upper edge with a length substantially equal to or greater than a length of a lower edge of the outlet.
Abstract translation: 半导体器件具有安装在衬底的表面上的半导体管芯。 模具底部填充分配针的宽度基本上等于半导体管芯的宽度。 分配针与半导体管芯的一侧流体连通。 将分注针的出口从半导体管芯的宽度均匀地沉积到半导体管芯和衬底之间的区域中，而不会发生分配针的移动。 分配针具有柄和T形构件的出口。 分配针可以在柄和出口之间具有多个极部。 分配针具有在柄和出口之间的板。 出口具有长度基本上等于或大于出口下边缘长度的上边缘。
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Patent Agency Ranking
2.发明授权Semiconductor device including bump formed on substrate to prevent extremely-low dielectric constant (ELK) interlayer dielectric layer (ILD) delamination during reflow process 有权半导体器件包括形成在衬底上的凸起，以防止回流过程中极低介电常数（ELK）层间介电层（ILD）分层公开(公告)号：US08519536B2
公开(公告)日：2013-08-27
申请号：US13691427
申请日：2012-11-30
Applicant: STATS ChipPAC, Ltd.
Inventor： KiYoun Jang , DaeSik Choi , OhHan Kim , DongSoo Moon
IPC: H01L23/48
CPC classification number: H01L21/4853 , H01L23/49811 , H01L24/03 , H01L24/05 , H01L24/16 , H01L24/81 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/0401 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/05655 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/81192 , H01L2224/814 , H01L2224/81411 , H01L2224/81413 , H01L2224/81416 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/81455 , H01L2224/81815 , H01L2924/00014 , H01L2924/0002 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2224/05552
Abstract: A semiconductor device that has a flipchip semiconductor die and substrate. A first insulating layer is formed over the substrate. A via is formed through the first insulating layer. Conductive material is deposited in the via to form a conductive pillar or stacked stud bumps. The conductive pillar is electrically connected to a conductive layer within the substrate. A second insulating layer is formed over the first insulating layer. Bump material is formed over the conductive pillar. The bump material is reflowed to form a bump. The first and second insulating layers are removed. The semiconductor die is mounted to the substrate by reflowing the bump to a conductive layer of the die. The semiconductor die also has a third insulating layer formed over the conductive layer and an active surface of the die and UBM formed over the first conductive layer and third insulating layer.
Abstract translation: 一种具有倒装芯片半导体管芯和衬底的半导体器件。 在衬底上形成第一绝缘层。 通过第一绝缘层形成通孔。 导电材料沉积在通孔中以形成导电柱或堆叠的柱状凸块。 导电柱与衬底内的导电层电连接。 在第一绝缘层上形成第二绝缘层。 凸起材料形成在导电柱上。 凸块材料被回流以形成凸块。 去除第一和第二绝缘层。 半导体管芯通过将凸块回流到管芯的导电层而安装到衬底上。 半导体管芯还具有形成在导电层上的第三绝缘层和形成在第一导电层和第三绝缘层上的管芯和UBM的有源表面。
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3.发明申请Semiconductor Device and Method of Forming Bump on Substrate to Prevent ELK ILD Delamination During Reflow Process 有权半导体器件和在基片上形成凸块以防止回流过程中ELK ILD分层的方法公开(公告)号：US20130264705A1
公开(公告)日：2013-10-10
申请号：US13906844
申请日：2013-05-31
Applicant: STATS ChipPAC, Ltd.
Inventor： KiYoun Jang , DaeSik Choi , OhHan Kim , DongSoo Moon
IPC: H01L21/48 , H01L23/498
CPC classification number: H01L21/4853 , H01L23/49811 , H01L24/03 , H01L24/05 , H01L24/16 , H01L24/81 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/0401 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/05655 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/81192 , H01L2224/814 , H01L2224/81411 , H01L2224/81413 , H01L2224/81416 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/81455 , H01L2224/81815 , H01L2924/00014 , H01L2924/0002 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2224/05552
Abstract: A semiconductor device that has a flipchip semiconductor die and substrate. A first insulating layer is formed over the substrate. A via is formed through the first insulating layer. Conductive material is deposited in the via to form a conductive pillar or stacked stud bumps. The conductive pillar is electrically connected to a conductive layer within the substrate. A second insulating layer is formed over the first insulating layer. Bump material is formed over the conductive pillar. The bump material is reflowed to form a bump. The first and second insulating layers are removed. The semiconductor die is mounted to the substrate by reflowing the bump to a conductive layer of the die. The semiconductor die also has a third insulating layer formed over the conductive layer and an active surface of the die and UBM formed over the first conductive layer and third insulating layer.
Abstract translation: 一种具有倒装芯片半导体管芯和衬底的半导体器件。 在衬底上形成第一绝缘层。 通过第一绝缘层形成通孔。 导电材料沉积在通孔中以形成导电柱或堆叠的柱状凸块。 导电柱与衬底内的导电层电连接。 在第一绝缘层上形成第二绝缘层。 凸起材料形成在导电柱上。 凸块材料被回流以形成凸块。 去除第一和第二绝缘层。 半导体管芯通过将凸块回流到管芯的导电层而安装到衬底上。 半导体管芯还具有形成在导电层上的第三绝缘层和形成在第一导电层和第三绝缘层上的管芯和UBM的有源表面。
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4.发明授权Semiconductor device with bump formed on substrate to prevent ELK ILD delamination during reflow process 有权在衬底上形成凸起的半导体器件，以防止回流过程中ELK ILD分层公开(公告)号：US08884339B2
公开(公告)日：2014-11-11
申请号：US13906844
申请日：2013-05-31
Applicant: STATS ChipPAC, Ltd.
Inventor： KiYoun Jang , DaeSik Choi , OhHan Kim , DongSoo Moon
IPC: H01L23/48
CPC classification number: H01L21/4853 , H01L23/49811 , H01L24/03 , H01L24/05 , H01L24/16 , H01L24/81 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/0401 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/05655 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/81192 , H01L2224/814 , H01L2224/81411 , H01L2224/81413 , H01L2224/81416 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/81455 , H01L2224/81815 , H01L2924/00014 , H01L2924/0002 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2224/05552
Abstract: A semiconductor device that has a flipchip semiconductor die and substrate. A first insulating layer is formed over the substrate. A via is formed through the first insulating layer. Conductive material is deposited in the via to form a conductive pillar or stacked stud bumps. The conductive pillar is electrically connected to a conductive layer within the substrate. A second insulating layer is formed over the first insulating layer. Bump material is formed over the conductive pillar. The bump material is reflowed to form a bump. The first and second insulating layers are removed. The semiconductor die is mounted to the substrate by reflowing the bump to a conductive layer of the die. The semiconductor die also has a third insulating layer formed over the conductive layer and an active surface of the die and UBM formed over the first conductive layer and third insulating layer.
Abstract translation: 一种具有倒装芯片半导体管芯和衬底的半导体器件。 在衬底上形成第一绝缘层。 通过第一绝缘层形成通孔。 导电材料沉积在通孔中以形成导电柱或堆叠的柱状凸块。 导电柱与衬底内的导电层电连接。 在第一绝缘层上形成第二绝缘层。 凸起材料形成在导电柱上。 凸块材料被回流以形成凸块。 去除第一和第二绝缘层。 半导体管芯通过将凸块回流到管芯的导电层而安装到衬底上。 半导体管芯还具有形成在导电层上的第三绝缘层和形成在第一导电层和第三绝缘层上的管芯和UBM的有源表面。
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5.发明申请Semiconductor Device and Method of Forming Mold Underfill Using Dispensing Needle Having Same Width as Semiconductor Die 有权半导体器件和使用具有与半导体芯片相同宽度的分配针形成模具底部填充物的方法公开(公告)号：US20140004659A1
公开(公告)日：2014-01-02
申请号：US14020996
申请日：2013-09-09
Applicant: STATS ChipPAC, Ltd.
Inventor： SooMoon Park , ByoungWook Jang , DongSoo Moon
IPC: H01L21/54
CPC classification number: H01L21/54 , H01L21/563 , H01L24/743 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73265 , H01L2224/83102 , H01L2224/92125 , H01L2924/01029 , H01L2924/01079 , H01L2924/01322 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/00
Abstract: A semiconductor device has a semiconductor die mounted over a surface of a substrate. A mold underfill dispensing needle has a width substantially equal to a width of the semiconductor die. The dispensing needle is placed in fluid communication with a side of the semiconductor die. A mold underfill is deposited from an outlet of the dispensing needle evenly across a width of the semiconductor die into an area between the semiconductor die and substrate without motion of the dispensing needle. The dispensing needle has a shank and the outlet in a T-configuration. The dispensing needle can have a plurality of pole portions between a shank and the outlet. The dispensing needle has a plate between a shank and the outlet. The outlet has an upper edge with a length substantially equal to or greater than a length of a lower edge of the outlet.
Abstract translation: 半导体器件具有安装在衬底的表面上的半导体管芯。 模具底部填充分配针的宽度基本上等于半导体管芯的宽度。 分配针与半导体管芯的一侧流体连通。 将分注针的出口从半导体管芯的宽度均匀地沉积到半导体管芯和衬底之间的区域中，而不会发生分配针的移动。 分配针具有柄和T形构件的出口。 分配针可以在柄和出口之间具有多个极部。 分配针具有在柄和出口之间的板。 出口具有长度基本上等于或大于出口下边缘长度的上边缘。
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公开(公告)号：US20130087913A1
公开(公告)日：2013-04-11
申请号：US13691427
申请日：2012-11-30
Applicant: STATS ChipPAC, Ltd.
Inventor： KiYoun Jang , DaeSik Choi , OhHan Kim , DongSoo Moon
IPC: H01L23/498
CPC classification number: H01L21/4853 , H01L23/49811 , H01L24/03 , H01L24/05 , H01L24/16 , H01L24/81 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/0401 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/05655 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/81192 , H01L2224/814 , H01L2224/81411 , H01L2224/81413 , H01L2224/81416 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/81455 , H01L2224/81815 , H01L2924/00014 , H01L2924/0002 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2224/05552
Abstract: A semiconductor device that has a flipchip semiconductor die and substrate. A first insulating layer is formed over the substrate. A via is formed through the first insulating layer. Conductive material is deposited in the via to form a conductive pillar or stacked stud bumps. The conductive pillar is electrically connected to a conductive layer within the substrate. A second insulating layer is formed over the first insulating layer. Bump material is formed over the conductive pillar. The bump material is reflowed to form a bump. The first and second insulating layers are removed. The semiconductor die is mounted to the substrate by reflowing the bump to a conductive layer of the die. The semiconductor die also has a third insulating layer formed over the conductive layer and an active surface of the die and UBM formed over the first conductive layer and third insulating layer.
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