公开(公告)号：US20130191581A1

公开(公告)日：2013-07-25

申请号：US13714590

申请日：2012-12-14

Applicant: STEC, Inc.

Inventor： Tsan Lin CHEN

IPC: G06F12/02

CPC classification number: H01L24/09 ,  G06F12/0246 ,  G06F13/16 ,  H01L24/06 ,  H01L27/0292 ,  H01L2224/06135 ,  H01L2224/0914 ,  H01L2224/09515

Abstract: Some embodiments of the disclosed subject matter include an integrated circuit. The integrated circuit includes a solid state device controller configured to control a plurality of flash memory devices, a first set of input output IO pads, coupled to the solid state device controller, arranged as a first pad ring around a perimeter of the integrated circuit, and a second set of IO pads arranged adjacent to at least one side of the first pad ring, wherein one of the second set of IO pads includes a power source node configured to receive a power supply voltage for the solid state device controller, a ground node, and a bond pad configured to receive an external signal.

Abstract translation: 所公开的主题的一些实施例包括集成电路。 集成电路包括被配置为控制多个闪存器件的固态器件控制器，耦合到固态器件控制器的第一组输入输出IO焊盘，被布置为围绕集成电路的周边的第一焊盘环， 以及与所述第一焊盘环的至少一侧相邻布置的第二组IO焊盘，其中所述第二组IO焊盘中的一个包括被配置为接收所述固态设备控制器的电源电压的电源节点， 节点和配置成接收外部信号的接合焊盘。

公开(公告)号：US20130194873A1

公开(公告)日：2013-08-01

申请号：US13752823

申请日：2013-01-29

Applicant: STEC, Inc.

Inventor： Tsan Lin CHEN

IPC: G11C16/04

CPC classification number: G11C16/04 ,  G06F13/1689 ,  G11C7/1051

Abstract: Systems and methods for auto-calibrating a storage memory controller are disclosed. In some embodiments, the systems and methods may be realized as a method for auto-calibrating a storage memory controller including instructing a controllable delay circuit to delay a read strobe signal at one of a plurality of delay settings, receiving data captured at a data latch using the delayed read strobe signal, selecting an adjustment factor from the plurality of delay settings using a multi-scale approach, based on an accuracy of the data captured at the data latch, and instructing the controllable delay circuit to delay the read strobe signal by the adjustment factor.

Abstract translation: 公开了用于自动校准存储存储器控制器的系统和方法。 在一些实施例中，系统和方法可以被实现为用于自动校准存储存储器控制器的方法，包括指示可控延迟电路以多个延迟设置中的一个来延迟读选通信号，接收在数据锁存器处捕获的数据 使用延迟读选通信号，基于在数据锁存器处捕获的数据的精度，使用多尺度方法从多个延迟设置中选择调整因子，并指示可控延迟电路延迟读选通信号 调整因素。

公开(公告)号：US20150187712A1

公开(公告)日：2015-07-02

申请号：US14657780

申请日：2015-03-13

Applicant: STEC, Inc.

Inventor： Tsan Lin CHEN

IPC: H01L23/00 ,  H01L27/02

CPC classification number: H01L24/09 ,  G06F12/0246 ,  G06F13/16 ,  H01L24/06 ,  H01L27/0292 ,  H01L2224/06135 ,  H01L2224/0914 ,  H01L2224/09515

Abstract: Some embodiments of the disclosed subject matter include an integrated circuit. The integrated circuit includes a solid state device controller configured to control a plurality of flash memory devices, a first set of input output IO pads, coupled to the solid state device controller, arranged as a first pad ring around a perimeter of the integrated circuit, and a second set of IO pads arranged adjacent to at least one side of the first pad ring, wherein one of the second set of IO pads includes a power source node configured to receive a power supply voltage for the solid state device controller, a ground node, and a bond pad configured to receive an external signal.

Abstract translation: 所公开的主题的一些实施例包括集成电路。 集成电路包括被配置为控制多个闪存器件的固态器件控制器，耦合到固态器件控制器的第一组输入输出IO焊盘，被布置为围绕集成电路的周边的第一焊盘环， 以及与所述第一焊盘环的至少一侧相邻布置的第二组IO焊盘，其中所述第二组IO焊盘中的一个包括被配置为接收所述固态设备控制器的电源电压的电源节点， 节点和配置成接收外部信号的接合焊盘。