公开(公告)号：US10177218B2

公开(公告)日：2019-01-08

申请号：US15365335

申请日：2016-11-30

Applicant: STMicroelectronics (Tours) SAS

Inventor： Frédéric Lanois ,  Alexei Ankoudinov ,  Vladimir Rodov

IPC: H02M3/158 ,  H01L29/06 ,  H01L29/861 ,  H01L29/10 ,  H01L29/423 ,  H01L29/78 ,  H01L27/06 ,  H01L27/092

Abstract: A diode includes upper and lower electrodes and first and second N-type doped semiconductor substrate portions connected to the lower electrode. A first vertical transistor and a second transistor are formed in the first portion and series-connected between the electrodes. The gate of the first transistor is N-type doped and coupled to the upper electrode. The second transistor has a P channel and has a P-type doped gate. First and second doped areas of the second conductivity type are located in the second portion and are separated by a substrate portion topped with another N-type doped gate. The first doped area is coupled to the gate of the second transistor. The second doped area and the other gate are coupled to the upper electrode.

公开(公告)号：US20220360072A1

公开(公告)日：2022-11-10

申请号：US17661352

申请日：2022-04-29

Applicant: STMicroelectronics (Tours) SAS

Inventor： Jean-Michel Simonnet ,  David Jouve ,  Frédéric Lanois

IPC: H02H9/04 ,  H02H9/00 ,  H01L27/02

Abstract: The present disclosure relates to a transient voltage suppression device comprising a single crystal semiconductor substrate doped with a first conductivity type comprising first and second opposing surfaces, a semiconductor region doped with a second conductivity type opposite to the first conductivity type extending into the substrate from the first surface, a first electrically conductive electrode on the first side contacting the semiconductor region and a second electrically conductive electrode on the second side contacting the substrate, a first interface between the substrate and the semiconductor region forming the junction of a TVS diode and a second interface between the first electrically conductive electrode and the semiconductor region or between the substrate and the second electrically conductive electrode forming the junction of a Schottky diode.

公开(公告)号：US10903311B2

公开(公告)日：2021-01-26

申请号：US16197011

申请日：2018-11-20

Applicant: STMicroelectronics (Tours) SAS

Inventor： Frédéric Lanois ,  Alexei Ankoudinov ,  Vladimir Rodov

IPC: H01L27/06 ,  H01L29/86 ,  H01L29/06 ,  H01L29/861 ,  H01L29/10 ,  H01L29/423 ,  H01L29/78 ,  H02M3/158 ,  H01L27/092

Abstract: A diode includes upper and lower electrodes and first and second N-type doped semiconductor substrate portions connected to the lower electrode. A first vertical transistor and a second transistor are formed in the first portion and series-connected between the electrodes. The gate of the first transistor is N-type doped and coupled to the upper electrode. The second transistor has a P channel and has a P-type doped gate. First and second doped areas of the second conductivity type are located in the second portion and are separated by a substrate portion topped with another N-type doped gate. The first doped area is coupled to the gate of the second transistor. The second doped area and the other gate are coupled to the upper electrode.

公开(公告)号：US12009658B2

公开(公告)日：2024-06-11

申请号：US17661352

申请日：2022-04-29

Applicant: STMicroelectronics (Tours) SAS

Inventor： Jean-Michel Simonnet ,  David Jouve ,  Frédéric Lanois

IPC: H02H9/04 ,  H01L27/02 ,  H02H9/00

CPC classification number: H02H9/046 ,  H01L27/0255 ,  H02H9/005

Abstract: The present disclosure relates to a transient voltage suppression device comprising a single crystal semiconductor substrate doped with a first conductivity type comprising first and second opposing surfaces, a semiconductor region doped with a second conductivity type opposite to the first conductivity type extending into the substrate from the first surface, a first electrically conductive electrode on the first side contacting the semiconductor region and a second electrically conductive electrode on the second side contacting the substrate, a first interface between the substrate and the semiconductor region forming the junction of a TVS diode and a second interface between the first electrically conductive electrode and the semiconductor region or between the substrate and the second electrically conductive electrode forming the junction of a Schottky diode.

公开(公告)号：US20190088735A1

公开(公告)日：2019-03-21

申请号：US16197011

申请日：2018-11-20

Applicant: STMicroelectronics (Tours) SAS

Inventor： Frédéric Lanois ,  Alexei Ankoudinov ,  Vladimir Rodov

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/78 ,  H01L29/861 ,  H01L27/06 ,  H02M3/158 ,  H01L27/092

Abstract: A diode includes upper and lower electrodes and first and second N-type doped semiconductor substrate portions connected to the lower electrode. A first vertical transistor and a second transistor are formed in the first portion and series-connected between the electrodes. The gate of the first transistor is N-type doped and coupled to the upper electrode. The second transistor has a P channel and has a P-type doped gate. First and second doped areas of the second conductivity type are located in the second portion and are separated by a substrate portion topped with another N-type doped gate. The first doped area is coupled to the gate of the second transistor. The second doped area and the other gate are coupled to the upper electrode.

公开(公告)号：US20170301752A1

公开(公告)日：2017-10-19

申请号：US15365335

申请日：2016-11-30

Applicant: STMicroelectronics (Tours) SAS

Inventor： Frédéric Lanois ,  Alexei Ankoudinov ,  Vladimir Rodov

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/423 ,  H02M3/158 ,  H01L29/10

CPC classification number: H01L29/063 ,  H01L27/0629 ,  H01L27/0922 ,  H01L29/1095 ,  H01L29/42364 ,  H01L29/7802 ,  H01L29/861 ,  H02M3/158

Abstract: A diode includes upper and lower electrodes and first and second N-type doped semiconductor substrate portions connected to the lower electrode. A first vertical transistor and a second transistor are formed in the first portion and series-connected between the electrodes. The gate of the first transistor is N-type doped and coupled to the upper electrode. The second transistor has a P channel and has a P-type doped gate. First and second doped areas of the second conductivity type are located in the second portion and are separated by a substrate portion topped with another N-type doped gate. The first doped area is coupled to the gate of the second transistor. The second doped area and the other gate are coupled to the upper electrode.