公开(公告)号：US20150140767A1

公开(公告)日：2015-05-21

申请号：US14606165

申请日：2015-01-27

Applicant: STMicroelectronics S.r.l.

Inventor： Giuseppe Croce ,  Paolo Gattari ,  Andrea Paleari ,  Alessandro Dundulachi

IPC: H01L29/66

CPC classification number: H01L29/66659 ,  H01L29/42368 ,  H01L29/7835

Abstract: A MOS transistor for power applications is formed in a substrate of semiconductor material by a method integrated in a process for manufacturing integrated circuits which uses an STI technique for forming insulating regions. The method includes the phases of forming an insulating element on a top surface of the substrate and forming a control electrode on a free surface of the insulating element. The insulating element insulates the control electrode from the substrate. The insulating element includes a first portion and a second portion. The extension of the first portion along a first direction perpendicular to the top surface is lower than the extension of the second portion along such first direction. The phase of forming the insulating element includes generating the second portion by locally oxidizing the top surface.

Abstract translation: 用于功率应用的MOS晶体管通过集成在用于形成绝缘区域的STI技术的集成电路的制造工艺中的方法形成在半导体材料的衬底中。 该方法包括在基板的顶表面上形成绝缘元件并在绝缘元件的自由表面上形成控制电极的阶段。 绝缘元件使控制电极与衬底绝缘。 绝缘元件包括第一部分和第二部分。 第一部分沿着垂直于顶面的第一方向的延伸比沿第一方向的第二部分的延伸小。 形成绝缘元件的相包括通过局部氧化顶表面来产生第二部分。