Abstract:
A liquid crystal display device including a first substrate, a second substrate which faces the first substrate and a liquid crystal layer which is interposed between the first and second substrates. The first substrate comprises an insulating substrate, a gate line which is disposed on the insulating substrate, data wires which comprises first and second data lines insulatedly crossing the gate line. The first substrate includes a first drain electrode electrically connected with the first data line, and a second drain electrode electrically connected with the second data line, a pixel electrode which comprises a first sub-pixel electrode electrically connected with one of the first and second drain electrodes, and a second sub-pixel electrode separated from the first sub-pixel electrode and electrically connected with the other one of the first and second drain electrodes. A semiconductor layer is disposed between the data wires and the insulating substrate. An ohmic contact layer is disposed between the semiconductor layer and the data wires, and directly contacts the semiconductor layer and the data wires. A light blocking layer is disposed between at least a part of the data wires and the insulating substrate.
Abstract:
Provided is a liquid crystal display (LCD), the LCD includes: an insulating substrate; a first gate line and a second gate line which are formed on the insulating substrate and extend parallel to each other; a data line formed on the insulating substrate, insulated from the first and second gate lines, and crosses the first and second gate lines; a first subpixel electrode connected to the first gate line and the data line by a first switching device and includes a plurality of first fine protruding patterns at an edge thereof; and a second subpixel electrode connected to the second gate line and the data line by a second switching device and includes a plurality of second fine protruding patterns at an edge thereof, wherein the first fine protruding patterns are separated from each other by a first gap, and the second fine protruding patterns are separated from each other by a second gap, wherein the sum of a width of the first gap and a width of each of the first fine protruding patterns is greater than the sum of a width of the second gap and a width of each of the second protruding patterns.
Abstract:
A display device and a driving method therefor includes a plurality of unit pixels arranged in a matrix form, a plurality of gate lines extending in a row direction and connected to the unit pixels, respectively, pluralities of first and second data lines extending in a column direction and connected to the unit pixels, respectively, a plurality of charge control lines extending in the row direction and connected to the unit pixels, respectively, a plurality of gate connection lines connected to at least two adjacent gate lines, respectively, and a plurality of charge connection lines connected to at least two adjacent charge control lines, respectively.
Abstract:
A thin film transistor array panel is provided, which includes: a substrate; a first signal line formed on the substrate; a second signal line formed on the substrate and intersecting the first signal line; a thin film transistor including a gate electrode connected to the first signal line and having an edge substantially parallel to the first signal line, a source electrode connected to the second signal line, and a drain electrode overlapping the edge of the gate electrode; and a pixel electrode connected to the drain electrode.
Abstract:
A liquid crystal display includes a first substrate; a pixel electrode disposed on the first substrate and having a first cutout extending at an oblique angle to a perimeter edge of the pixel electrode, a second substrate facing the first substrate, a common electrode disposed on the second substrate and having a second cutout arranged adjacent to the first cutout, an opaque member disposed on one of the first or the second substrates, and a liquid crystal layer disposed between the pixel electrode and the common electrode, wherein the first cutout divides the pixel electrode into partitions, wherein the partitions are connected to each other by an interconnection, and the interconnection is spaced apart from the perimeter edge of the pixel electrode or disposed on or under the opaque member.
Abstract:
An LCD has a storage electrode wire between long sides of partitions of a pixel electrode and gate lines or data lines. A gate wire and a storage electrode wire are formed on a substrate and covered with a gate insulating layer. A data wire is formed on the gate insulating layer and covered with a passivation layer. A thin film transistor including gate, source and drain electrodes are provided on the substrate. A pixel electrode is formed on the passivation layer and connected to the drain electrode. The pixel electrode is divided into three partitions, a first one having long and short sides parallel to data lines and gate lines, respectively, and second and third ones vice versa. A storage electrode line and some storage electrodes are disposed between the long sides of the partitions and the gate or the data lines, and between the long sides of the partitions. Other storage electrodes disposed between the short sides of the partitions and the gate or the data lines are covered by the pixel electrode. A storage electrode between the short side of the first portion and the long side of the partition is spaced apart from the first partition by at least 3 &mgr;m.
Abstract:
In an array substrate capable of improving the quality of displayed images and a method for manufacturing the array substrate, the array substrate includes a base substrate, a first conductive pattern including a gate line and a first light-blocking pattern, a semiconductor layer overlapping the light-blocking pattern, a second conductive pattern including a data line and a storage line overlapping the first light-blocking pattern, and a pixel electrode overlapping the storage line to form a storage capacitor. The first conductive pattern may further include a second light-blocking pattern overlapping the semiconductor layer which is formed under the data line. The first and second light-blocking patterns block light proceeding toward the semiconductor layer formed under the storage line and under the data line, respectively, so that the semiconductor layer may be prevented from being excited by light energy.
Abstract:
In a display substrate and a vertical alignment display panel having the same, the display panel includes an array substrate and an opposite substrate. A plurality of first slit portions are arranged through a pixel area of a common electrode on the array substrate, and the first slit portions extend in a slanted direction. A plurality of grooves and a plurality of protruding portions are alternately arranged at edges facing each other on the first slit portion, so that the first slit portions are patterned. A positive singular point is generated on a side surface of a protruding portion, and a negative singular point is generated between the positive singular points.
Abstract:
In an array substrate, an LCD panel having the same and an LCD device having the same, the array substrate may include an insulating substrate, a switching element (e.g., a transistor such as a TFT), a main pixel portion, a coupling capacitor and a sub-pixel portion. The switching element may be formed on the insulating substrate in a pixel region defined by gate and data lines adjacent to each other. The gate and data lines may be formed on the insulating substrate. The main pixel portion is on a first (e.g., central) portion of the pixel region. The coupling capacitor is electrically connected to the switching element. The coupling capacitor is on the insulating substrate. The sub-pixel portion is electrically connected to the coupling capacitor. The sub-pixel portion is on a second (e.g., peripheral) portion of the pixel region. Therefore, an image display quality is improved.
Abstract:
In an array substrate, an LCD panel having the same and an LCD device having the same, the array substrate may include an insulating substrate, a switching element (e.g., a transistor such as a TFT), a main pixel portion, a coupling capacitor and a sub-pixel portion. The switching element may be formed on the insulating substrate in a pixel region defined by gate and data lines adjacent to each other. The gate and data lines may be formed on the insulating substrate. The main pixel portion is on a first (e.g., central) portion of the pixel region. The coupling capacitor is electrically connected to the switching element. The coupling capacitor is on the insulating substrate. The sub-pixel portion is electrically connected to the coupling capacitor. The sub-pixel portion is on a second (e.g., peripheral) portion of the pixel region. Therefore, an image display quality is improved.