公开(公告)号：US20240177750A1

公开(公告)日：2024-05-30

申请号：US18144531

申请日：2023-05-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byoungkon JO ,  Gyesik OH ,  Wangyong IM ,  Duk Sung KIM ,  Jangseok CHOI

IPC: G11C7/10 ,  G11C5/06

CPC classification number: G11C7/1096 ,  G11C5/06 ,  G11C7/1039 ,  G11C7/1093

Abstract: A semiconductor memory device, includes, a cell array including a plurality of memory banks, a command decoder configured to decode a read/write command, a read command, and a write command that are input from outside of the semiconductor memory devide, an address decoder receiving a read address and a write address, an input receiver configured to transmit write data input through a write data pad to a global input/output driver of a memory bank corresponding to the write address, and an output driver configured to transmit read data output from an input/output sense amplifier of a memory bank corresponding to the read address to a read data pad, wherein the write data is input via the write data pad in a single data rate method and transmitted to the global input/output driver without deserialization processing, and the read data is transmitted from the input/output sense amplifier to the read data pad without serialization processing. In some embodiments, the semiconductor memory device is electrically and physically coupled to a central processing unit by hybrid copper bonding.

公开(公告)号：US20250013366A1

公开(公告)日：2025-01-09

申请号：US18597373

申请日：2024-03-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： BYOUNGKON JO ,  Minwoo LEE ,  Joonho JUN ,  Duk Sung KIM ,  Doohee HWANG

IPC: G06F3/06

Abstract: There is provided a memory device including a content addressable memory physical layer connected to external data pads. During the write operation, the content addressable memory physical layer transmits a selected data pattern from among data patterns stored in a content addressable memory cell array as input data to selected memory cells of a memory cell array corresponding to an address received from external device based on first data received from the external data pads. During the read operation, the content addressable memory physical layer compares output data read from the memory cell array with the data patterns based on an address received from external device, and outputs content addressable memory address corresponding to data pattern matched by a result of the comparing as second data through the external data pads.

公开(公告)号：US20240387495A1

公开(公告)日：2024-11-21

申请号：US18508143

申请日：2023-11-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minwoo LEE ,  Joonho JUN ,  Duk Sung KIM ,  Byoungkon JO

IPC: H01L25/18 ,  H01L23/00 ,  H01L23/48 ,  H01L23/535 ,  H01L23/538 ,  H01L25/065

Abstract: A semiconductor package according to an example includes a base die having a first surface and a second surface opposite each other; a first group of core dies stacked on the first surface of the base die and electrically connected to the base die; a mount member facing the second surface of the base die; a second group of core dies between the base die and the mount member, the second group of core dies being stacked on the second surface of the base die and electrically connected to the base die; and an interface for an electrical connection between the base die and the mount member.