公开(公告)号：US20250015046A1

公开(公告)日：2025-01-09

申请号：US18661640

申请日：2024-05-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seho You ,  Kyungdon Mun

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/522 ,  H10B80/00

Abstract: A semiconductor package includes a package substrate including first and second wirings, a logic chip on the package substrate, electrically connected to the first wiring, and including a first wireless communication element, a chip structure on the logic chip, and including a buffer chip containing first and second through-electrodes, a first connection circuit electrically connected to the first through-electrode, and a second connection circuit electrically connected to the second through-electrode, and a plurality of memory chips stacked on the buffer chip and electrically connected to the first and second through-electrodes, a second wireless communication element within the buffer chip or between the buffer chip and the logic chip, electrically connected to the first connection circuit, and coupled to the first wireless communication element, and a plurality of conductive vertical structures between the chip structure and the package substrate and electrically connecting the second connection circuit and the second wiring.

公开(公告)号：US20210210427A1

公开(公告)日：2021-07-08

申请号：US16988831

申请日：2020-08-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam Kang ,  Youngchan Ko ,  Kyungdon Mun

IPC: H01L23/522 ,  H01L23/36 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor package includes a redistribution substrate including a first redistribution layer; a semiconductor chip having a connection pad connected to the first redistribution layer; a vertical connection conductor electrically connected to the connection pad by the first redistribution layer; a core member having a first through-hole accommodating the semiconductor chip and a second through-hole accommodating the vertical connection conductor; an encapsulant filling the first and second through-holes; and a redistribution member including a second redistribution layer. The vertical connection conductor and the core member include a same material. A width of a lower surface of the vertical connection conductor is wider than that of an upper surface thereof, a width of a lower end of the first through-hole is narrower than that of an upper end thereof, and a width of a lower end of the second through-hole is narrower than that of an upper end thereof.

公开(公告)号：US20240321839A1

公开(公告)日：2024-09-26

申请号：US18530542

申请日：2023-12-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungdon Mun ,  Kyounglim Suk ,  Jihwang Kim

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H10B80/00

CPC classification number: H01L25/105 ,  H01L23/3107 ,  H01L23/367 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H10B80/00 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/1431 ,  H01L2924/1434

Abstract: A semiconductor package includes a first redistribution structure including a first redistribution insulating layer and a first redistribution pattern, a first lower semiconductor device mounted on the first redistribution structure, a molding layer surrounding the first lower semiconductor device on the first redistribution structure, a plurality of vertical connection conductors in the molding layer and electrically connected to the first redistribution pattern, a heat dissipation plate disposed on an upper surface of the first lower semiconductor device, and a plurality of upper semiconductor devices disposed on the molding layer and on the first lower semiconductor device, each of the plurality of upper semiconductor devices vertically overlapping a different respective region of the first lower semiconductor device.

公开(公告)号：US20240120280A1

公开(公告)日：2024-04-11

申请号：US18214341

申请日：2023-06-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungdon Mun ,  Shanghoon Seo ,  Jihwang Kim ,  Sangjin Baek ,  Hyeonjeong Hwang

IPC: H01L23/538 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00 ,  H01L25/16 ,  H01L25/18 ,  H10B80/00

CPC classification number: H01L23/5383 ,  H01L21/561 ,  H01L23/5385 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/16 ,  H01L25/16 ,  H01L25/18 ,  H01L25/50 ,  H10B80/00 ,  H01L24/06 ,  H01L24/17 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1443 ,  H01L2924/14511 ,  H01L2924/19106

Abstract: A semiconductor package includes a first redistribution structure, a first semiconductor device mounted on the first redistribution structure, a molding layer surrounding the first semiconductor device, a second redistribution structure disposed on the molding layer and the first semiconductor device, a plurality of vertical connection conductors vertically extending in the molding layer and electrically connecting the first redistribution pattern to the second redistribution pattern, a second semiconductor device mounted on the second redistribution structure, the second semiconductor device and the first semiconductor device vertically and partially overlapping each other, a heat dissipation pad structure contacting an upper surface of the first semiconductor device, and a heat dissipation plate disposed on the heat dissipation pad structure and spaced apart from the second semiconductor device along a first straight line extending in a horizontal direction that is parallel to the upper surface of the first semiconductor device.

公开(公告)号：US11342274B2

公开(公告)日：2022-05-24

申请号：US16990717

申请日：2020-08-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangkyu Lee ,  Jingu Kim ,  Kyungdon Mun ,  Shanghoon Seo ,  Jeongho Lee

IPC: H01L23/538 ,  H01L25/00 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L25/10

Abstract: A semiconductor package is disclosed. The semiconductor package includes a back-side wiring substrate and a front-side redistribution layer which are in parallel, and a connector, a semiconductor chip and an encapsulator which are between the back-side wiring substrate and the front-side redistribution layer. The encapsulator surrounds surfaces of the connector and the semiconductor chip. The back-side wiring substrate includes a core layer, a back-side via plug extending through the core layer, and a back-side redistribution layer on the back-side via plug.

公开(公告)号：US12119305B2

公开(公告)日：2024-10-15

申请号：US18161066

申请日：2023-01-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungdon Mun ,  Myungsam Kang ,  Youngchan Ko ,  Yieok Kwon ,  Jeongseok Kim ,  Gongje Lee ,  Bongju Cho

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L23/5386 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5385 ,  H01L24/08 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/08235 ,  H01L2224/73204 ,  H01L2225/06517 ,  H01L2225/0652

Abstract: A semiconductor package includes a redistribution substrate including a first redistribution layer; a semiconductor chip electrically connected to the first redistribution layer; a vertical connection structure adjacent a periphery of the semiconductor chip and electrically connected to the first redistribution layer; and an encapsulant on the vertical connection structure. The vertical connection structure includes a metal pillar having a bottom surface facing the redistribution substrate, a top surface positioned opposite to the bottom surface, and a side surface positioned between the bottom surface and the top surface. The vertical connection structure further includes a plating layer on each of the bottom surface, the top surface, and the side surface of the metal pillar, and having a roughened surface.

公开(公告)号：US20240332157A1

公开(公告)日：2024-10-03

申请号：US18500098

申请日：2023-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangjin Baek ,  Kyungdon Mun

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49838 ,  H01L23/3128 ,  H01L23/49822 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/13021 ,  H01L2224/13111 ,  H01L2224/16227 ,  H01L2224/81385 ,  H01L2224/81455

Abstract: A semiconductor package includes a redistribution structure including an insulating layer. A plurality of redistribution layers are disposed within the insulating layer. A recess extends from an upper surface of the insulating layer and exposes at least a portion of a first uppermost redistribution layer. A first pad structure is disposed on a bottom and an inner wall of the recess. The first pad structure defines a cavity that is open upwardly. A semiconductor chip is disposed on the upper surface of the redistribution structure and includes a connection terminal electrically connected to the plurality of redistribution layers. A connection bump is disposed within the cavity and electrically connects the connection terminal of the semiconductor chip to the first pad structure of the redistribution structure. An encapsulant covers at least a portion of the semiconductor chip.

公开(公告)号：US11626367B2

公开(公告)日：2023-04-11

申请号：US16988831

申请日：2020-08-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam Kang ,  Youngchan Ko ,  Kyungdon Mun

IPC: H01L23/522 ,  H01L23/31 ,  H01L23/00 ,  H01L23/36

Abstract: A semiconductor package includes a redistribution substrate including a first redistribution layer; a semiconductor chip having a connection pad connected to the first redistribution layer; a vertical connection conductor electrically connected to the connection pad by the first redistribution layer; a core member having a first through-hole accommodating the semiconductor chip and a second through-hole accommodating the vertical connection conductor; an encapsulant filling the first and second through-holes; and a redistribution member including a second redistribution layer. The vertical connection conductor and the core member include a same material. A width of a lower surface of the vertical connection conductor is wider than that of an upper surface thereof, a width of a lower end of the first through-hole is narrower than that of an upper end thereof, and a width of a lower end of the second through-hole is narrower than that of an upper end thereof.

公开(公告)号：US20250062221A1

公开(公告)日：2025-02-20

申请号：US18937377

申请日：2024-11-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MYUNGSAM KANG ,  Youngchan Ko ,  Jeongseok Kim ,  Kyungdon Mun

IPC: H01L23/522 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498

Abstract: A semiconductor package includes a support substrate having connection wirings disposed therein. At least one capacitor is disposed on the support substrate. The capacitor has first and second electrodes that are exposed from an upper surface of the support substrate. A redistribution wiring layer covers the upper surface of the support substrate. The redistribution wiring layer has redistribution wirings electrically connected to the connection wirings and the first and second electrodes respectively. A semiconductor chip is disposed on the redistribution wiring layer. The semiconductor chip has chip pads that are electrically connected to the redistribution wirings and outer connectors disposed on a lower surface of the support substrate and electrically connected to the connection wirings.

公开(公告)号：US20240136250A1

公开(公告)日：2024-04-25

申请号：US18197998

申请日：2023-05-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yeonho Jang ,  Inhyung Song ,  Kyungdon Mun ,  Hyeonjeong Hwang

IPC: H01L23/373 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L25/16

CPC classification number: H01L23/3738 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/08 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/165 ,  H01L25/0657 ,  H01L2224/08145 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2924/1431 ,  H01L2924/1436

Abstract: The present disclosure provides semiconductor packages including a heat dissipation structure. In some embodiments, the semiconductor package includes a package substrate, a stacked chip disposed on the package substrate and including a lower chip and an upper chip, a memory chip disposed on the package substrate adjacent to the stacked chip, and an encapsulant encapsulating at least a portion of the stacked chip and the memory chip on the package substrate. An upper surface of the upper chip is exposed from the encapsulant. A dummy silicon chip is in contact with the upper chip on the lower chip.