公开(公告)号：US20200303492A1

公开(公告)日：2020-09-24

申请号：US16556786

申请日：2019-08-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Jin KIM ,  Sung Soo YIM

IPC: H01L49/02 ,  H01L27/108

Abstract: A method of manufacturing a semiconductor device includes sequentially stacking a mold layer and a supporter layer on a substrate, forming a plurality of capacitor holes passing through the mold layer and supporter layer, forming a plurality of lower electrodes filling the capacitor holes, forming a supporter mask pattern having a plurality of mask holes on the supporter layer and the lower electrodes, and forming a plurality of supporter holes by patterning the supporter layer. Each of the plurality of lower electrodes has a pillar shape, and each of the mask holes is between four adjacent lower electrodes and has a circular shape.

公开(公告)号：US20240128310A1

公开(公告)日：2024-04-18

申请号：US18396302

申请日：2023-12-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Jin KIM ,  Sung Soo YIM

IPC: H01G4/38 ,  H10B12/00

CPC classification number: H01L28/90 ,  H10B12/033 ,  H10B12/315

Abstract: A method of manufacturing a semiconductor device includes sequentially stacking a mold layer and a supporter layer on a substrate, forming a plurality of capacitor holes passing through the mold layer and supporter layer, forming a plurality of lower electrodes filling the capacitor holes, forming a supporter mask pattern having a plurality of mask holes on the supporter layer and the lower electrodes, and forming a plurality of supporter holes by patterning the supporter layer. Each of the plurality of lower electrodes has a pillar shape, and each of the mask holes is between four adjacent lower electrodes and has a circular shape.

公开(公告)号：US20220020845A1

公开(公告)日：2022-01-20

申请号：US17489961

申请日：2021-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Jin KIM ,  Sung Soo YIM

IPC: H01L49/02 ,  H01L27/108

Abstract: A method of manufacturing a semiconductor device includes sequentially stacking a mold layer and a supporter layer on a substrate, forming a plurality of capacitor holes passing through the mold layer and supporter layer, forming a plurality of lower electrodes filling the capacitor holes, forming a supporter mask pattern having a plurality of mask holes on the supporter layer and the lower electrodes, and forming a plurality of supporter holes by patterning the supporter layer. Each of the plurality of lower electrodes has a pillar shape, and each of the mask holes is between four adjacent lower electrodes and has a circular shape.