公开(公告)号：US20190067258A1

公开(公告)日：2019-02-28

申请号：US15960698

申请日：2018-04-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Young KIM ,  PYOUNGWAN KIM ,  HYUNKI KIM ,  Junwoo PARK ,  Sangsoo KIM ,  Seung Hwan KIM ,  Sung-Kyu PARK ,  Insup SHIN

IPC: H01L25/11 ,  H01L25/00

CPC classification number: H01L25/117 ,  H01L21/561 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16227 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2225/1082 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2224/81

Abstract: Disclosed are a semiconductor package and a method of fabricating the same. The semiconductor package comprises a lower semiconductor chip on a lower substrate, a lower molding layer covering the lower semiconductor chip on the lower substrate and including a molding cavity that extends toward the lower semiconductor chip from a top surface of the lower molding layer, an interposer substrate on the top surface of the lower molding layer and including a substrate opening that penetrates the interposer substrate and overlaps the molding cavity, and an upper package on the interposer substrate. The molding cavity has a floor surface spaced apart from the upper package across a substantially hollow space.

公开(公告)号：US20140103517A1

公开(公告)日：2014-04-17

申请号：US14052980

申请日：2013-10-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Kyu PARK ,  Hyeongmun KANG ,  Ji-Han KO

IPC: H01L23/50

CPC classification number: H01L23/50 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00

Abstract: A package substrate includes a substrate including a top surface and a bottom surface facing each other, the top surface including a first region where a semiconductor chip is mounted and a second region surrounding the first region, and a dummy post on the second region of the top surface to protrude upward from the top surface.

Abstract translation: 封装基板包括基板，该基板包括彼此面对的顶表面和底表面，所述顶表面包括安装半导体芯片的第一区域和围绕所述第一区域的第二区域，以及位于所述第二区域的第二区域上的虚拟柱 顶面从顶面向上突出。