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公开(公告)号：US11017127B2
公开(公告)日：2021-05-25
申请号：US15885187
申请日：2018-01-31
Applicant: Seagate Technology LLC
Inventor： Stacey Secatch , Kristofer C. Conklin , Dana Lynn Simonson , Robert Wayne Moss
Abstract: Method and apparatus for managing data in a data storage device configured as a storage compute appliance. In some embodiments, the data storage device has a non-volatile memory (NVM) and a controller circuit. The NVM stores a plurality of data sets encrypted by at least one encryption key. The controller circuit performs a storage compute appliance process by locally decrypting the plurality of data sets in a local memory of the data storage device, generating summary results data from the decrypted data sets, and transferring the summary results data across the host interface to an authorized user without a corresponding transfer of any portion of the decrypted data sets across the host interface.
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公开(公告)号：US11308239B2
公开(公告)日：2022-04-19
申请号：US15980299
申请日：2018-05-15
Applicant: Seagate Technology LLC
Inventor： Robert Wayne Moss
Abstract: Method and apparatus for protecting against a jitter attack upon a cryptographic processing device. In some embodiments, the cryptographic processing circuit is configured to perform a cryptographic function on a set of input data to generate a corresponding set of transformed output data. An input line supplies an input signal used by the cryptographic processing IC during execution of the cryptographic function. A monitor circuit monitors the input signal, and temporarily disables the cryptographic processing IC when time-varying changes to the input signal indicate a jitter attack may be taking place. The input signal may be a source voltage, and voltage transitions in the source voltage can be monitored. Alternatively, the input signal may be a clock signal, and frequency variations in the clock signal can be monitored. The monitor circuit may be arranged on a power island to maintain power during power fluctuations.
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公开(公告)号：US20210191752A1
公开(公告)日：2021-06-24
申请号：US16946081
申请日：2020-06-05
Applicant: Seagate Technology LLC
Inventor： Robert Wayne Moss
Abstract: Method and apparatus for deterministically arbitrating a shared resource in a system, such as a solid-state drive (SSD) operated in accordance with the NVMe (Non-Volatile Memory Express) specification. An NVM, such as a flash memory, is coupled to a controller circuit for concurrent servicing of data transfer commands from multiple users along parallel data paths that include a shared resource. A time cycle during which the shared resource can be used is divided into a sequence of time-slices, each assigned to a different user. The shared resource is thereafter repetitively allocated over a succession of time cycles to each of the users in turn during the associated time-slices. If a selected time-slice goes unused by the associated user, the shared resource remains unused rather than being used by a different user, even if a pending request for the shared resource has been issued.
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公开(公告)号：US11481342B2
公开(公告)日：2022-10-25
申请号：US16451864
申请日：2019-06-25
Applicant: Seagate Technology LLC
Inventor： Robert Wayne Moss , Michael Shaw , Thomas V. Spencer , Yalan Liu , Sarvani Reddy Kolli
Abstract: A data storage system can organize a semiconductor memory into a first data set and a second data set with a first queue populated with a first data access request from a host. An assignment of an arbitration weight to the first queue with an arbitration circuit corresponds with the first queue being skipped during a deterministic window based on the arbitration weight.
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公开(公告)号：US10739996B1
公开(公告)日：2020-08-11
申请号：US15213298
申请日：2016-07-18
Applicant: Seagate Technology LLC
Inventor： David Scott Ebsen , Kevin A Gomez , Mark Ish , Daniel John Benjamin , Robert Wayne Moss
IPC: G06F16/00 , G06F3/06 , G06F16/17 , G06F16/11 , G06F16/2455
Abstract: Systems and methods are disclosed for enhanced garbage collection operations at a memory device. The enhanced garbage collection may include selecting data and blocks to garbage collect to improve device performance. Data may be copied and reorganized according to a data stream via which the data was received, or data and blocks may be evaluated for garbage collection based on other access efficiency metrics. Data may be selected for collection based on sequentiality of the data, host access patterns, or other factors. Processing of host commands may be throttled based on a determined amount of work to garbage collect a plurality of blocks, in order to limit variability in host command throughput over a time period.
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Patent Agency Ranking
公开(公告)号：US20190303624A1
公开(公告)日：2019-10-03
申请号：US15980299
申请日：2018-05-15
Applicant: Seagate Technology LLC
Inventor： Robert Wayne Moss
Abstract: Method and apparatus for protecting against a jitter attack upon a cryptographic processing device. In some embodiments, the cryptographic processing circuit is configured to perform a cryptographic function on a set of input data to generate a corresponding set of transformed output data. An input line supplies an input signal used by the cryptographic processing IC during execution of the cryptographic function. A monitor circuit monitors the input signal, and temporarily disables the cryptographic processing IC when time-varying changes to the input signal indicate a jitter attack may be taking place. The input signal may be a source voltage, and voltage transitions in the source voltage can be monitored. Alternatively, the input signal may be a clock signal, and frequency variations in the clock signal can be monitored. The monitor circuit may be arranged on a power island to maintain power during power fluctuations.
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公开(公告)号：US20190236317A1
公开(公告)日：2019-08-01
申请号：US15885144
申请日：2018-01-31
Applicant: Seagate Technology LLC
Inventor： Dana Lynn Simonson , Stacey Secatch , Kristofer C. Conklin , Robert Wayne Moss
CPC classification number: G06F21/78 , G06F3/0619 , G06F3/0623 , G06F3/0679 , G06F3/068 , G06F9/5016 , G06F21/31 , H04L9/3271
Abstract: Method and apparatus for managing data in a data storage device configured as a storage compute appliance. In some embodiments, the data storage device has a controller circuit and a non-volatile memory (NVM) with an overall data storage capacity. A processor authenticates each of a plurality of authorized users of the NVM via data exchanges between a host device and the processor without reference to an external authentication authority device. Upon authentication, each authorized user is allocated a separate portion of the overall data storage capacity of the NVM using an allocation model. The size of at least one of the separate portions is subsequently adjusted based on an access history of the NVM. The storage device may be a key-value storage device so that a separate set of key values is provided to each authorized user to identify data blocks stored to and retrieved from the NVM.
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公开(公告)号：US11157212B2
公开(公告)日：2021-10-26
申请号：US16946096
申请日：2020-06-05
Applicant: Seagate Technology LLC
Inventor： Robert Wayne Moss , Thomas V. Spencer , Eric James Behnke
IPC: G06F3/06
Abstract: Method and apparatus for managing data transfers. In some embodiments, first and second storage devices respectively include first and second controllers, first and second local memories, and first and second non-volatile memories (NVMs). A virtual controller memory buffer (CMB) is formed from a dedicated portion of each of the first and second local memories for control by a host device. The first controller receives a virtual command set from the host device, and extracts a first local command to transfer data between the host device and the first NVM. In some cases, the second controller also receives the virtual command set and concurrently extracts a different, second local command to transfer data between the host device and the second NVM. Alternatively, the first controller may extract and forward the second local command to the second controller. The first and second NVMs may form an NVMe (Non-Volatile Memory Express) namespace.
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公开(公告)号：US20210191657A1
公开(公告)日：2021-06-24
申请号：US16946096
申请日：2020-06-05
Applicant: Seagate Technology LLC
Inventor： Robert Wayne Moss , Thomas V. Spencer , Eric James Behnke
IPC: G06F3/06
Abstract: Method and apparatus for managing data transfers. In some embodiments, first and second storage devices respectively include first and second controllers, first and second local memories, and first and second non-volatile memories (NVMs). A virtual controller memory buffer (CMB) is formed from a dedicated portion of each of the first and second local memories for control by a host device. The first controller receives a virtual command set from the host device, and extracts a first local command to transfer data between the host device and the first NVM. In some cases, the second controller also receives the virtual command set and concurrently extracts a different, second local command to transfer data between the host device and the second NVM. Alternatively, the first controller may extract and forward the second local command to the second controller. The first and second NVMs may form an NVMe (Non-Volatile Memory Express) namespace.
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公开(公告)号：US10909272B2
公开(公告)日：2021-02-02
申请号：US15885144
申请日：2018-01-31
Applicant: Seagate Technology LLC
Inventor： Dana Lynn Simonson , Stacey Secatch , Kristofer C. Conklin , Robert Wayne Moss
Abstract: Method and apparatus for managing data in a data storage device configured as a storage compute appliance. In some embodiments, the data storage device has a controller circuit and a non-volatile memory (NVM) with an overall data storage capacity. A processor authenticates each of a plurality of authorized users of the NVM via data exchanges between a host device and the processor without reference to an external authentication authority device. Upon authentication, each authorized user is allocated a separate portion of the overall data storage capacity of the NVM using an allocation model. The size of at least one of the separate portions is subsequently adjusted based on an access history of the NVM. The storage device may be a key-value storage device so that a separate set of key values is provided to each authorized user to identify data blocks stored to and retrieved from the NVM.
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