公开(公告)号：US20230288766A1

公开(公告)日：2023-09-14

申请号：US18117095

申请日：2023-03-03

Applicant: Sharp Display Technology Corporation

Inventor： Hikaru YOSHINO ,  Junichi MORINAGA

IPC: G02F1/1362

CPC classification number: G02F1/136286 ,  G02F1/136222 ,  G02F1/1368

Abstract: A display device includes an array substrate, a counter substrate, a first pixel electrode, a second pixel electrode spaced apart from the first pixel electrode in a first direction, a third pixel electrode spaced apart from the second pixel electrode in the first direction, a first wiring line positioned between the first pixel electrode and the second pixel electrode and extending in a second direction intersecting the first direction, a second pixel electrode row including the second pixel electrode and composed of a plurality of pixel electrodes aligned in the second direction, a third pixel electrode row including the third pixel electrode and composed of a plurality of pixel electrodes aligned in the second direction, a first insulating film disposed on a lower-layer side of the first wiring line, and a spacer protruding from the counter substrate toward the array substrate.

公开(公告)号：US20230205016A1

公开(公告)日：2023-06-29

申请号：US18083239

申请日：2022-12-16

Applicant: Sharp Display Technology Corporation

Inventor： Junichi MORINAGA ,  Hikaru YOSHINO

IPC: G02F1/1337 ,  G02F1/1362 ,  G02F1/1339 ,  G02F1/1343

CPC classification number: G02F1/13378 ,  G02F1/1343 ,  G02F1/13392 ,  G02F1/136209 ,  G02F1/136286 ,  H01L27/1214

Abstract: A liquid crystal panel includes an array substrate, a counter substrate disposed to face the array substrate, and a liquid crystal layer sandwiched between the array substrate and the counter substrate, in which the array substrate is provided with a plurality of pixel electrodes aligned at intervals in a plane of the array substrate, a common electrode disposed to overlap the plurality of pixel electrodes, an insulating film disposed on an upper layer side of the common electrode, and an alignment film disposed on an upper layer side of the insulating film, a light blocking portion and a spacer are provided in the counter substrate, the light blocking portion separating the plurality of pixel electrodes, the spacer being disposed to overlap the light blocking portion and protruding to the liquid crystal layer side from the counter substrate, the alignment film is connected to the common electrode directly or via another member through an opening provided in the insulating film, and the opening is disposed at a position that does not overlap the spacer and overlaps the light blocking portion in the insulating film.

公开(公告)号：US20230251530A1

公开(公告)日：2023-08-10

申请号：US18095959

申请日：2023-01-11

Applicant: Sharp Display Technology Corporation

Inventor： Junichi MORINAGA ,  Hikaru YOSHINO

IPC: G02F1/1339 ,  H01L27/12 ,  G02F1/1335 ,  G02F1/1368 ,  G02F1/1343 ,  G02F1/1362

CPC classification number: G02F1/13396 ,  H01L27/124 ,  G02F1/133514 ,  G02F1/1368 ,  G02F1/134309 ,  G02F1/133512 ,  G02F1/136286

Abstract: A display device includes an array substrate, a counter substrate facing the array substrate at an interval therebetween, a plurality of pixels constituted by the plurality of pixel electrodes and the plurality of color filters, and a plurality of thin film transistors. The plurality of pixels include a plurality of first pixels each having the highest relative luminous efficiency, a plurality of second pixels each having the lowest relative luminous efficiency, and a plurality of third pixels each having relative luminous efficiency lower than the relative luminous efficiency of the first pixels and higher than the relative luminous efficiency of the second pixels, a plurality of spacers include a plurality of spacers having different overlapping relationships with the thin film transistors being overlapping targets.

公开(公告)号：US20240329474A1

公开(公告)日：2024-10-03

申请号：US18585150

申请日：2024-02-23

Applicant: Sharp Display Technology Corporation

Inventor： Junichi MORINAGA ,  Shingo KAMITANI ,  Hikaru YOSHINO

IPC: G02F1/1362 ,  G02F1/1333 ,  G02F1/1345 ,  G06F3/044

CPC classification number: G02F1/136286 ,  G02F1/1345 ,  G02F1/13338 ,  G06F3/0443

Abstract: A wiring substrate includes a first wiring and a second wiring that intersects the first wiring. The first wiring is formed of a lower-layer wiring portion formed of a first conductive film and an upper-layer wiring portion formed of a second conductive film disposed on an upper layer side of the first conductive film via a first insulating film. A first contact hole that connects the lower-layer wiring portion and the upper-layer wiring portion is provided at a position where the first insulating film overlaps both the lower-layer wiring portion and the upper-layer wiring portion in the first insulating film. The second wiring is formed of a third conductive film disposed on an upper layer side of the second conductive film via second insulating films. The second insulating films have a larger film thickness than a film thickness of the first insulating film.

公开(公告)号：US20230112631A1

公开(公告)日：2023-04-13

申请号：US17963287

申请日：2022-10-11

Applicant: Sharp Display Technology Corporation

Inventor： Hikaru YOSHINO ,  Satoshi HORIUCHI ,  Junichi MORINAGA

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368

Abstract: An active matrix substrate includes a substrate in which a notch or an aperture is formed, and electrodes. Each electrode includes at least either of: a capacitor forming portion that is arranged in a region other than a bypass region and overlaps with at least one of a plurality of bypass gate lines when viewed in a plan view; and an electrode layer portion that is formed in an electrode layer and that composes a bypass gate line interposed portion together with a source line layer portion formed in a source line layer in the bypass region. The electrode layer portion and the source line layer portion overlap with at least one of the bypass gate lines in the bypass region when viewed in a plan view, and at least one of the bypass gate lines is positioned between the electrode layer portion and the source line layer portion in a normal line direction of the substrate.

公开(公告)号：US20220326583A1

公开(公告)日：2022-10-13

申请号：US17685656

申请日：2022-03-03

Applicant: Sharp Display Technology Corporation

Inventor： Junichi MORINAGA ,  Hikaru YOSHINO

IPC: G02F1/1362 ,  G02F1/1343 ,  G06F3/041

Abstract: A wiring board includes position detection lines, position detection electrodes, a line, connection lines, and a short-circuit line. The position detection lines extend along a first direction and transmit at least position detection signals. The position detection electrodes are arranged at intervals with respect to the first direction and connected to the position detection lines. The line is disposed between the position detection electrodes that are adjacent to each other with respect to the first direction and the line extends in a second direction that crosses the first direction. The connection lines extend along the first direction and are connected to the position detection electrodes. The connection lines are arranged at intervals with respect to the second direction. The short-circuit line extends along the second direction and overlaps the line via an insulating film and is connected to the connection lines.

公开(公告)号：US20250044629A1

公开(公告)日：2025-02-06

申请号：US18918274

申请日：2024-10-17

Applicant: Sharp Display Technology Corporation

Inventor： Junichi MORINAGA ,  Hikaru YOSHINO

IPC: G02F1/1333 ,  G02F1/1335 ,  G02F1/1337 ,  G02F1/1339 ,  G02F1/1343 ,  G02F1/1362

Abstract: A liquid crystal panel includes an array substrate, a counter substrate disposed to face the array substrate, and a liquid crystal layer sandwiched between the array substrate and the counter substrate, in which the array substrate is provided with a plurality of pixel electrodes aligned at intervals in a plane of the array substrate, a common electrode disposed to overlap the plurality of pixel electrodes, an insulating film disposed on an upper layer side of the common electrode, and an alignment film disposed on an upper layer side of the insulating film, a light blocking portion and a spacer are provided in the counter substrate, the light blocking portion separating the plurality of pixel electrodes, the spacer being disposed to overlap the light blocking portion and protruding to the liquid crystal layer side from the counter substrate, the alignment film is connected to the common electrode directly or via another member through an opening provided in the insulating film, and the opening is disposed at a position that does not overlap the spacer and overlaps the light blocking portion in the insulating film.

公开(公告)号：US20240393646A1

公开(公告)日：2024-11-28

申请号：US18614489

申请日：2024-03-22

Applicant: Sharp Display Technology Corporation

Inventor： Junichi MORINAGA ,  Hiroyuki Ohgami ,  Hikaru Yoshino

IPC: G02F1/1343 ,  G02F1/1337 ,  G02F1/1362

Abstract: A liquid crystal display device includes source wiring lines, and first electrode and second electrode configured to generate a fringe electrical field. The first electrode includes slits. Each slit forms an acute angle with pixel short-hand direction defined in row direction smaller than an acute angle formed by each slit and pixel longitudinal direction defined in column direction. The slits include first slits each extending an acute angle in a clockwise direction with respect to the pixel short-hand direction, and second slits each extending an acute angle in a counterclockwise direction with respect to the pixel short-hand direction. The first electrode includes first region in which the first slits are formed, and second region in which the second slits are formed. In a plan view, each source wiring line is bent at a position corresponding to a boundary between the first region and the second region.

公开(公告)号：US20240105735A1

公开(公告)日：2024-03-28

申请号：US18243197

申请日：2023-09-07

Applicant: Sharp Display Technology Corporation

Inventor： Hikaru YOSHINO ,  Shingo KAMITANI ,  Junichi MORINAGA

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368 ,  G06F3/044

CPC classification number: H01L27/124 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G06F3/0446 ,  G06F3/0447

Abstract: In an array substrate, a plurality of wiring lines include a first wiring line located between a first pixel electrode and a second pixel electrode in a first direction, and a second wiring line located between a third pixel electrode and a fourth pixel electrode in the first direction. A plurality of switching elements include a first switching element and a second switching element. A plurality of common electrodes include a first common electrode overlapping the first pixel electrode, the second pixel electrode, the third pixel electrode, the first wiring line, and a first semiconductor portion, and a second common electrode overlapping the fourth pixel electrode and the second wiring line. Further, there is provided a first overlapping portion that is disposed overlapping a second semiconductor portion and has the same potential as that of any of the plurality of common electrodes.