DRIVING SUBSTRATE AND DISPLAY PANEL

    公开(公告)号:US20240427202A1

    公开(公告)日:2024-12-26

    申请号:US18633421

    申请日:2024-04-11

    Inventor: Shinzoh MURAKAMI

    Abstract: A driving substrate of a display panel includes A driving substrate of a display panel, the driving substrate a pixel element, a plurality of terminals, formed by at least one metal layer and placed outside a pixel region in which the pixel element is placed, that are connected separately to each of a plurality of output signal bumps of a driving circuit, and a plurality of output signal wires extending separately from each of the plurality of terminals to the pixel region. The plurality of output signal wires are placed between adjacent two of the plurality of terminals in planar view. The plurality of output signal wires placed between the adjacent two terminals include two or more output signal wires formed by two or more layers. The two or more output signal wires are disposed to at least partially overlap each other in planar view.

    DISPLAY DEVICE
    2.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20240251618A1

    公开(公告)日:2024-07-25

    申请号:US18562021

    申请日:2021-06-21

    Inventor: Shinzoh MURAKAMI

    CPC classification number: H10K59/131 G09G3/3225 G09G2300/0842

    Abstract: On a chip-mounting portion, a plurality of chip-use terminals are provided in a single row, and a plurality of terminal lines are provided extending parallel to each other in such a manner as to correspond to the plurality of chip-use terminals and being electrically connected respectively to the plurality of chip-use terminals, and a chip support body is provided between the plurality of chip-use terminals.

    DISPLAY DEVICE
    4.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20240357882A1

    公开(公告)日:2024-10-24

    申请号:US18289315

    申请日:2021-06-24

    CPC classification number: H10K59/131 H10K59/8731 H10K77/111 H10K2102/311

    Abstract: In a chip mounting portion, a plurality of chip terminals arranged in a row and a plurality of terminal wiring lines corresponding to the plurality of chip terminals, the plurality of terminal wiring lines extending parallel to one another and being electrically connected to the plurality of chip terminals, respectively, are provided. For at least one chip terminal of the plurality of chip terminals, a chip support body is provided at each terminal wiring line with the chip support body overlapping the terminal wiring line corresponding to the at least one chip terminal or an extension line of the terminal wiring line.

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