公开(公告)号：US09465712B2

公开(公告)日：2016-10-11

申请号：US13928050

申请日：2013-06-26

Applicant: Silicon Graphics International Corp.

Inventor： Daniel Thomas ,  John Baron

IPC: G06F3/00 ,  G06F11/34

CPC classification number: G06F11/3006 ,  G06F11/3404 ,  G06F11/3419 ,  G06F11/3428 ,  G06F11/3447 ,  G06F11/3457 ,  G06F11/3461 ,  G06F11/3466 ,  G06F11/3668 ,  G06F17/5009

Abstract: A method and computer program product for testing a high performance computing application performing a computation within a clustered computer arrangement is disclosed. The high performance computing arrangement performances computations across processors in parallel wherein the processors cooperate to perform the computation. The application can be tested by adding delay and therefore latency to one or more commands inside of the precompiled application. The addition of delay can be used to simulate the performance of different interconnects that are used within the high performance computing arrangement.

Abstract translation: 公开了一种用于测试在集群计算机装置内执行计算的高性能计算应用的方法和计算机程序产品。 并行处理器的高性能计算布置性能计算，其中处理器协作以执行计算。 可以通过对预编译应用程序中的一个或多个命令添加延迟并因此进行延迟来测试应用程序。 可以使用延迟的添加来模拟在高性能计算布置中使用的不同互连的性能。

公开(公告)号：US20140269342A1

公开(公告)日：2014-09-18

申请号：US13843919

申请日：2013-03-15

Applicant: Silicon Graphics International Corp.

Inventor： John Baron

IPC: H04L12/26

CPC classification number: H04L43/50 ,  H04L41/0645 ,  H04L41/0677 ,  H04L41/12

Abstract: In accordance with some implementations, a method for evaluating large scale computer systems based on performance is disclosed. A large scale, distributed memory computer system receives topology data, wherein the topology data describes the connections between the plurality of switches and lists the nodes associated with each switch. Based on the received topology data, the system performs a data transfer test for each of the pair of switches. The test includes transferring data between a plurality of nodes and determining a respective overall test result value reflecting overall performance of a respective pair of switches for a plurality of component tests. The system determines that the pair of switches meets minimum performance standards by comparing the overall test result value against an acceptable test value. If the overall test result value does not meet the minimum performance standards, the system reports the respective pair of switches as underperforming.

Abstract translation: 根据一些实施方式，公开了一种基于性能来评估大规模计算机系统的方法。 大规模分布式存储器计算机系统接收拓扑数据，其中拓扑数据描述多个交换机之间的连接，并列出与每个交换机相关联的节点。 基于接收到的拓扑数据，系统对每对开关进行数据传输测试。 测试包括在多个节点之间传送数据，并且确定反映用于多个组件测试的相应的一对开关的整体性能的相应的总体测试结果值。 系统通过将总体测试结果值与可接受的测试值进行比较来确定该对开关满足最低性能标准。 如果总体测试结果值不符合最低性能标准，则系统会将相应的开关对报告为表现不佳。

公开(公告)号：US20150007198A1

公开(公告)日：2015-01-01

申请号：US13928050

申请日：2013-06-26

Applicant: Silicon Graphics International Corp.

Inventor： Daniel Thomas ,  John Baron

IPC: G06F9/54

CPC classification number: G06F11/3006 ,  G06F11/3404 ,  G06F11/3419 ,  G06F11/3428 ,  G06F11/3447 ,  G06F11/3457 ,  G06F11/3461 ,  G06F11/3466 ,  G06F11/3668 ,  G06F17/5009

Abstract: A method and computer program product for testing a high performance computing application performing a computation within a clustered computer arrangement is disclosed. The high performance computing arrangement performances computations across processors in parallel wherein the processors cooperate to perform the computation. The application can be tested by adding delay and therefore latency to one or more commands inside of the precompiled application. The addition of delay can be used to simulate the performance of different interconnects that are used within the high performance computing arrangement.

Abstract translation: 公开了一种用于测试在集群计算机装置内执行计算的高性能计算应用的方法和计算机程序产品。 并行处理器的高性能计算布置性能计算，其中处理器协作以执行计算。 可以通过对预编译应用程序中的一个或多个命令添加延迟并因此进行延迟来测试应用程序。 可以使用延迟的添加来模拟在高性能计算布置中使用的不同互连的性能。

公开(公告)号：US20150006713A1

公开(公告)日：2015-01-01

申请号：US13930955

申请日：2013-06-28

Applicant: Silicon Graphics International Corp.

Inventor： Daniel Thomas ,  John Baron ,  Michael Andrew Raymond

IPC: H04L12/26

CPC classification number: H04L43/0876 ,  H04L41/069 ,  H04L41/12 ,  H04L43/045 ,  H04L43/062 ,  H04L43/067 ,  H04L43/0888

Abstract: A method and computer program product for tracking network activity within a high performance computing environment is disclosed An application may be run in the high performance computing environment and a computation within the application may be performed in parallel on more than one processor. When the application is executed, data is gathered about the performance of hardware devices within the high performance computing environment and the clocking signals are adjusted to a global clock. The temporal data may be processed for a hardware device for a defined time period to develop one or more temporal performance metrics.Additionally, all activities that occur on a hardware device for a given time period can be determined and visualized.

Abstract translation: 公开了一种用于在高性能计算环境内跟踪网络活动的方法和计算机程序产品。应用可以在高性能计算环境中运行，并且应用程序内的计算可以在多于一个处理器上并行执行。 当执行应用程序时，将收集有关高性能计算环境中硬件设备性能​​的数据，并将时钟信号调整为全局时钟。 可以为硬件设备处理定义的时间段的时间数据以开发一个或多个时间性能度量。 此外，可以确定和可视化在给定时间段内在硬件设备上发生的所有活动。