公开(公告)号：US20210076248A1

公开(公告)日：2021-03-11

申请号：US16945870

申请日：2020-08-02

Applicant: Silicon Laboratories Inc.

Inventor： Subba Reddy KALLAM ,  Partha MURALI ,  Venkat MATTELA ,  Venkata Siva Prasad PULAGAM

IPC: H04W28/02 ,  H04W72/06 ,  H04W72/08 ,  H04W16/18 ,  H04W84/12 ,  H04W4/80 ,  G06F9/38 ,  G06F9/30

Abstract: A multi-thread communication system has several communications processors operative over a single interface for transmitting and receiving packets. The multi-thread communications processor is operative to sequentially handle multiple thread processes for each communications processor on a cycle by cycle basis according to a thread map register which determines the order of execution and how many cycles of a particular thread occur during a canonical interval.