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    Flip-chip process and bonding equipment
    3.
    发明授权
    Flip-chip process and bonding equipment 有权

    公开(公告)号：US11605554B2

    公开(公告)日：2023-03-14

    申请号：US17392462

    申请日：2021-08-03

    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

    Inventor： Yu-Lung Huang ,  Chih-Ming Huang ,  Kuo-Hua Yu ,  Chang-Fu Lin

    IPC: H01L21/68 ,  H01L23/00 ,  H01L21/683

    Abstract: A flip-chip process is to provide a pressing jig with a channel, so that the pressing jig grips a chip module by vacuum suction through the channel, and the chip module can be bonded onto a circuit board via a plurality of solder bumps through the pressing jig, and then a heating device is provided to heat the plurality of solder bumps and reflow the plurality of solder bumps. Therefore, the chip module can be vacuum-gripped by the pressing jig to suppress deformation of the chip module, so that the solder bumps can effectively connect to corresponding contacts of the circuit board.

    ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
    7.
    发明申请
    ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20230053125A1

    公开(公告)日：2023-02-16

    申请号：US17978493

    申请日：2022-11-01

    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

    Inventor： Yu-Lung Huang ,  Chih-Ming Huang ,  Kuo-Hua Yu ,  Chang-Fu Lin

    IPC: H01L23/538 ,  H01L23/498 ,  H01L21/48

    Abstract: An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.

    Electronic package and manufacturing method thereof
    8.
    发明授权
    Electronic package and manufacturing method thereof 有权

    公开(公告)号：US11521930B2

    公开(公告)日：2022-12-06

    申请号：US17068988

    申请日：2020-10-13

    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

    Inventor： Yu-Lung Huang ,  Chih-Ming Huang ,  Kuo-Hua Yu ,  Chang-Fu Lin

    IPC: H01L23/538 ,  H01L21/48 ,  H01L23/498

    Abstract: An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.

    ELECTRONIC PACKAGE, HEAT DISSIPATION STRUCTURE AND MANUFACTURING METHOD THEREOF
    9.
    发明申请
    ELECTRONIC PACKAGE, HEAT DISSIPATION STRUCTURE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20220375813A1

    公开(公告)日：2022-11-24

    申请号：US17583946

    申请日：2022-01-25

    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

    Inventor： Yu-Lung Huang ,  Kuo-Hua Yu ,  Chang-Fu Lin

    IPC: H01L23/367

    Abstract: A heat dissipation structure is provided and includes a heat dissipation body and an adjustment channel. A carrying area and an active area adjacent to the carrying area are defined on a surface of the heat dissipation body, the carrying area is used for applying a first heat dissipation material thereonto, and the adjustment channel is formed in the active area, where one end of the adjustment channel communicates with the outside of the heat dissipation structure, and the other end communicates with the carrying area. Therefore, when the heat dissipation body is coupled to the electronic component by the first heat dissipation material, the adjustment channel can adjust a volume of the first heat dissipation material.

    ELECTRONIC PACKAGE, MANUFACTURING METHOD THEREOF AND CONDUCTIVE STRUCTURE
    10.
    发明申请
    ELECTRONIC PACKAGE, MANUFACTURING METHOD THEREOF AND CONDUCTIVE STRUCTURE 有权

    公开(公告)号：US20210320076A1

    公开(公告)日：2021-10-14

    申请号：US16922169

    申请日：2020-07-07

    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

    Inventor： Yu-Lung Huang ,  Chee-Key Chung ,  Chang-Fu Lin ,  Yuan-Hung Hsu

    IPC: H01L23/00

    Abstract: Provided is an electronic package, including a first substrate of a first conductive structure and a second substrate of a second conductive structure, where a first conductive layer, a bump body and a metal auxiliary layer of the first conductive structure are sequentially formed on the first substrate, and a metal pillar, a second conductive layer, a metal layer and a solder layer of the second conductive structure are sequentially formed on the second substrate, such that the solder layer is combined with the bump body and the metal auxiliary layer to stack the first substrate and the second substrate. Therefore, the arrangement of the bump body and the metal auxiliary layer allows complete reaction of the IMCs after reflowing the solder layer, and the volume of the conductive structures will not continue to shrink. As such, the problem of cracking of the conductive structures can be effectively averted.

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