公开(公告)号：US06438686B1

公开(公告)日：2002-08-20

申请号：US09296195

申请日：1999-04-20

Applicant: Gregory M. Daughtry ,  Hieu T. Tran ,  Srithar Ramesh ,  Andrew J. McRonald

Inventor： Gregory M. Daughtry ,  Hieu T. Tran ,  Srithar Ramesh ,  Andrew J. McRonald

IPC: G06F15177

CPC classification number: G06F13/4217 ,  G06F15/17

Abstract: A method and apparatus for eliminating contention with dual masters. One method disclosed disables a default bus master, and tests for a second bus master. If the second bus master fails to respond, the default bus master is enabled.

Abstract translation: 一种用于消除双重主机争用的方法和装置。 一种公开的方法禁用默认总线主机，并测试第二总线主机。 如果第二总线主机无法响应，默认总线主机将被使能。

公开(公告)号：US06714092B1

公开(公告)日：2004-03-30

申请号：US09703723

申请日：2000-11-02

Applicant: Srithar Ramesh

Inventor： Srithar Ramesh

IPC: H03H512

CPC classification number: H05K1/0233 ,  H05K2201/086 ,  H05K2201/10015

Abstract: A circuit for removing noise from the power supply of a clock generator. Switching regulator noise from the voltage regulator section can affect a clock chip when it is carried through the power plane or ground plane. In order to remove this, a ferrite bead is placed along the voltage supply line. A bulk capacitor with low equivalent series resistance is connected from the output side of the ferrite bead to ground. By properly selecting the size of the bead and capacitor, the noise is reduced. The result is that the clock does not drift so that functional failures are reduced.

Abstract translation: 用于从时钟发生器的电源中去除噪声的电路。 来自稳压器部分的开关稳压器噪声在通过电源平面或接地平面时会影响时钟芯片。 为了去除这种情况，沿着电压供给线放置铁氧体磁珠。 具有低等效串联电阻的大容量电容器从铁氧体磁珠的输出侧连接到地。 通过适当选择珠和电容器的尺寸，降低噪声。 结果是时钟不漂移，从而减少了功能故障。