公开(公告)号：US6274464B2

公开(公告)日：2001-08-14

申请号：US77142801

申请日：2001-01-26

Applicant: TEXAS INSTRUMENTS INC

Inventor： DROBNY VLADIMIR F ,  BAO KEVIN X

IPC: H01L21/8249 ,  H01L21/20 ,  H01L21/36

CPC classification number: H01L21/8249 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02661

Abstract: An epitaxial layer is formed on a P type silicon substrate in which a plurality of P+ buried layer regions, a plurality of N+ buried layer regions, and a P+ field layer region occupying most of the substrate surface are diffused. The substrate is loaded in a reactor with a carrier gas. The substrate is pre-baked at a temperature of approximately 850° C. As the substrate is heated to a temperature of 1050° C., N+ dopant gas is injected into the carrier gas to suppress auto doping due to P+ atoms that escape from the P+ buried layer regions. The substrate is subjected to a high temperature bake cycle in the presence of the N+ dopant gas. A first thin intrinsic epitaxial cap layer is deposited on the substrate, which then is subjected to a high temperature gas purge cycle at 1080° C. A second thin intrinsic epitaxial cap layer then is deposited on the first, and a second high temperature gas purge cycle is performed at 1080° C. Then an N-epitaxial layer is deposited on the second cap layer at 1080° C. The harmful effects of a dip in the dopant concentration profile at the bottoms of the collectors of the NPN transistors are avoided by the process.

Abstract translation: 在P型硅衬底上形成外延层，其中多个P +掩埋层区域，多个N +掩埋层区域和占据衬底表面大部分的P +场层区域扩散。 将衬底装载在具有载气的反应器中。 衬底在大约850℃的温度下预烘烤。当衬底被加热到1050℃的温度时，N +掺杂剂气体被注入到载气中以抑制由于P +原子逸出的自由掺杂 P +埋层区域。 在N +掺杂气体的存在下，对基板进行高温烘烤循环。 第一薄的本征外延盖层沉积在衬底上，然后在1080℃下经受高温气体吹扫循环。然后将第二薄的本征外延盖层沉积在第一和第二高温气体吹扫 在1080℃下进行循环。然后在1080℃下在第二盖层上沉积N外延层。在NPN晶体管的集电极的底部的掺杂浓度分布中的浸渍的有害影响通过 的过程。