公开(公告)号：US20250086107A1

公开(公告)日：2025-03-13

申请号：US18463046

申请日：2023-09-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yaron Alpert ,  Barak Cherches ,  Guy Shubeli ,  Yoav Ben-Yehezkel

IPC: G06F12/02 ,  G06F12/14

Abstract: In an embodiment, a method includes receiving a logical address from a primary device and determining an address header based on the logical address. The method also includes determining an offset value based on the address header and applying the offset value to a first portion of the logical address to create an offset address portion. The method further includes generating a physical address that includes the address header and the offset address portion and accessing a physical resource using the physical address.

公开(公告)号：US20230112720A1

公开(公告)日：2023-04-13

申请号：US17499522

申请日：2021-10-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Guy Shubeli ,  Barak Cherches ,  Uri Weinrib

IPC: G06F3/06

Abstract: A hardware direct memory access controller including an input port configured to receive data from an electronic device for direct memory access transfer, an output port configured to provide data for direct memory access, and processing circuitry is disclosed. The processing circuitry is configured to receive data comprising a header and payload from the electronic device via the input port, parse the header to determine data parameters including a transaction length and an input data format, and select a target destination for the data based at least in part on the data parameters. The processing circuitry is also configured to allocate memory within the target destination based at least in part on the transaction length, and to format the payload for direct memory access based at least in part on the data parameters, and to transfer the formatted payload for storage within the allocated memory within the target destination via the output port using direct memory access.