公开(公告)号：US20180144081A1

公开(公告)日：2018-05-24

申请号：US15809830

申请日：2017-11-10

Applicant: TechInsights Inc.

Inventor： Dale CARLSON

IPC: G06F17/50 ,  G06T7/00

CPC classification number: G06F17/5068 ,  G06F17/5081 ,  G06T7/0002 ,  G06T2207/30148

Abstract: Described are various embodiments of a system and method for verifying extracted integrated circuit (IC) features representative of a source IC and stored in a feature dataset structure. Generally, a set of extracted IC features imaged within a designated IC area is converted into a static tile image. The static tile image is then rendered for visualization as an interactive mapping of the feature dataset structure within the area. Corrections for one or more of the set of extracted IC features are received based on the static tile image and input corrections are executed on the feature dataset structure to produce an updated feature dataset structure.

公开(公告)号：US20210357564A1

公开(公告)日：2021-11-18

申请号：US17443397

申请日：2021-07-26

Applicant: TechInsights Inc.

Inventor： Dale CARLSON

IPC: G06F30/39 ,  G06T7/00 ,  G06F30/398

Abstract: Described are various embodiments of a system and method for verifying extracted integrated circuit (IC) features representative of a source IC and stored in a feature dataset structure. Generally, a set of extracted IC features imaged within a designated IC area is converted into a static tile image. The static tile image is then rendered for visualization as an interactive mapping of the feature dataset structure within the area. Corrections for one or more of the set of extracted IC features are received based on the static tile image and input corrections are executed on the feature dataset structure to produce an updated feature dataset structure.