公开(公告)号：US09899353B2

公开(公告)日：2018-02-20

申请号：US14725975

申请日：2015-05-29

Applicant: Tessera, Inc.

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Vage Oganesian ,  David Ovrutsky ,  Laura Wills Mirkarimi

IPC: H01L25/065 ,  H01L25/00 ,  H01L21/683 ,  H01L21/78 ,  H01L23/538 ,  H01L23/00

CPC classification number: H01L21/78 ,  H01L21/6835 ,  H01L23/5382 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68377 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

Abstract: A microelectronic assembly includes first and second stacked microelectronic elements, each having spaced apart traces extending along a front face and beyond at least a first edge thereof. An insulating region can contact the edges of each microelectronic element and at least portions of the traces of each microelectronic element extending beyond the respective first edges. The insulating region can define first and second side surfaces adjacent the first and second edges of the microelectronic elements. A plurality of spaced apart openings can extend along a side surface of the microelectronic assembly. Electrical conductors connected with respective traces can have portions disposed in respective openings and extending along the respective openings. The electrical conductors may extend to pads or solder balls overlying a face of one of the microelectronic elements.

公开(公告)号：US09048234B2

公开(公告)日：2015-06-02

申请号：US13914896

申请日：2013-06-11

Applicant: Tessera, Inc.

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Vage Oganesian ,  David Ovrutsky ,  Laura Wills Mirkarimi

IPC: H01L25/00 ,  H01L21/683 ,  H01L21/78 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L21/78 ,  H01L21/6835 ,  H01L23/5382 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68377 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

Abstract: A microelectronic assembly includes first and second stacked microelectronic elements, each having spaced apart traces extending along a front face and beyond at least a first edge thereof. An insulating region can contact the edges of each microelectronic element and at least portions of the traces of each microelectronic element extending beyond the respective first edges. The insulating region can define first and second side surfaces adjacent the first and second edges of the microelectronic elements. A plurality of spaced apart openings can extend along a side surface of the microelectronic assembly. Electrical conductors connected with respective traces can have portions disposed in respective openings and extending along the respective openings. The electrical conductors may extend to pads or solder balls overlying a face of one of the microelectronic elements.

Abstract translation: 微电子组件包括第一和第二堆叠的微电子元件，每个微电子元件具有沿前表面延伸并且至少其第一边缘延伸的间隔开的迹线。 绝缘区域可以接触每个微电子元件的边缘，并且每个微电子元件的迹线的至少部分延伸超过相应的第一边缘。 绝缘区域可以限定与微电子元件的第一和第二边缘相邻的第一和第二侧表面。 多个间隔开的开口可以沿着微电子组件的侧表面延伸。 与相应迹线连接的电导体可以具有设置在相应开口中并沿相应开口延伸的部分。 电导体可以延伸到覆盖在微电子元件中的一个的表面上的焊盘或焊球。

公开(公告)号：US20130344652A1

公开(公告)日：2013-12-26

申请号：US13911555

申请日：2013-06-06

Applicant: Tessera, Inc.

Inventor： Belgacem Haba ,  Giles Humpston ,  David Ovrutsky ,  Laura Wills Mirkarimi

IPC: H01L21/50

CPC classification number: H01L21/50 ,  H01L24/24 ,  H01L24/96 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/04105 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/00

Abstract: A stacked microelectronic unit is provided which can include a plurality of vertically stacked microelectronic elements each having a front surface, contacts exposed at the front surface, a rear surface and edges extending between the front and rear surfaces. Traces connected with the contacts may extend along the front surfaces towards edges of the microelectronic elements with the rear surface of at least one of the stacked microelectronic elements being adjacent to a top face of the microelectronic unit. A plurality of conductors may extend along edges of the microelectronic elements from the traces to the top face. The conductors may be conductively connected with unit contacts such that the unit contacts overlie the rear surface of the at least one microelectronic element adjacent to the top face.

Abstract translation: 提供堆叠的微电子单元，其可以包括多个垂直堆叠的微电子元件，每个微电子元件具有前表面，暴露在前表面的触点，后表面和在前表面和后表面之间延伸的边缘。 与触点连接的迹线可以沿着前表面朝向微电子元件的边缘延伸，其中至少一个堆叠的微电子元件的后表面与微电子单元的顶面相邻。 多个导体可以沿着微电子元件的边缘从迹线延伸到顶面。 导体可以与单元触点导电连接，使得单元接触覆盖邻近顶面的至少一个微电子元件的后表面。

公开(公告)号：US20140151881A1

公开(公告)日：2014-06-05

申请号：US14177527

申请日：2014-02-11

Applicant: Tessera, Inc.

Inventor： Andrey Grinman ,  David Ovrutsky ,  Charles Rosenstein ,  Vage Oganesian

IPC: H01L23/498

CPC classification number: H01L23/3128 ,  H01L23/29 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/556 ,  H01L24/17 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16148 ,  H01L2224/274 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1058 ,  H01L2225/1064 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/1436 ,  H01L2924/3025 ,  H01L2924/00

Abstract: A chip-sized, wafer level packaged device including a portion of a semiconductor wafer including a device, at least one packaging layer containing silicon and formed over the device, a first ball grid array formed over a surface of the at least one packaging layer and being electrically connected to the device and a second ball grid array formed over a surface of the portion of the semiconductor wafer and being electrically connected to the device.

Abstract translation: 一种芯片尺寸的晶片级封装器件，其包括半导体晶片的一部分，其包括器件，至少一个包含硅并且形成在器件上的封装层，形成在所述至少一个封装层的表面上的第一球栅阵列;以及 电连接到所述装置，以及形成在所述半导体晶片的所述部分的表面上并且电连接到所述装置的第二球栅阵列。

公开(公告)号：US20150380336A1

公开(公告)日：2015-12-31

申请号：US14753895

申请日：2015-06-29

Applicant: Tessera, Inc.

Inventor： Andrey Grinman ,  David Ovrutsky ,  Charles Rosenstein ,  Vage Oganesian

IPC: H01L23/31 ,  H01L23/29 ,  H01L25/065 ,  H01L23/556 ,  H01L23/00

CPC classification number: H01L23/3128 ,  H01L23/29 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/556 ,  H01L24/17 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16148 ,  H01L2224/274 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1058 ,  H01L2225/1064 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/1436 ,  H01L2924/3025 ,  H01L2924/00

Abstract: A chip-sized, wafer level packaged device including a portion of a semiconductor wafer including a device, at least one packaging layer containing silicon and formed over the device, a first ball grid array formed over a surface of the at least one packaging layer and being electrically connected to the device and a second ball grid array formed over a surface of the portion of the semiconductor wafer and being electrically connected to the device.

Abstract translation: 一种芯片尺寸的晶片级封装器件，其包括半导体晶片的一部分，其包括器件，至少一个包含硅并且形成在器件上的封装层，形成在所述至少一个封装层的表面上的第一球栅阵列;以及 电连接到所述装置，以及形成在所述半导体晶片的所述部分的表面上并且电连接到所述装置的第二球栅阵列。

公开(公告)号：US20150333042A1

公开(公告)日：2015-11-19

申请号：US14725975

申请日：2015-05-29

Applicant: Tessera, Inc.

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Vage Oganesian ,  David Ovrutsky ,  Laura Wills Mirkarimi

IPC: H01L25/065 ,  H01L25/00

CPC classification number: H01L21/78 ,  H01L21/6835 ,  H01L23/5382 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68377 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

Abstract: A microelectronic assembly includes first and second stacked microelectronic elements, each having spaced apart traces extending along a front face and beyond at least a first edge thereof. An insulating region can contact the edges of each microelectronic element and at least portions of the traces of each microelectronic element extending beyond the respective first edges. The insulating region can define first and second side surfaces adjacent the first and second edges of the microelectronic elements. A plurality of spaced apart openings can extend along a side surface of the microelectronic assembly. Electrical conductors connected with respective traces can have portions disposed in respective openings and extending along the respective openings. The electrical conductors may extend to pads or solder balls overlying a face of one of the microelectronic elements.

Abstract translation: 微电子组件包括第一和第二堆叠的微电子元件，每个微电子元件具有沿前表面延伸并且至少其第一边缘延伸的间隔开的迹线。 绝缘区域可以接触每个微电子元件的边缘，并且每个微电子元件的迹线的至少部分延伸超过相应的第一边缘。 绝缘区域可以限定与微电子元件的第一和第二边缘相邻的第一和第二侧表面。 多个间隔开的开口可以沿着微电子组件的侧表面延伸。 与相应迹线连接的电导体可以具有设置在相应开口中并沿相应开口延伸的部分。 电导体可以延伸到覆盖在微电子元件中的一个的表面上的焊盘或焊球。

公开(公告)号：US09070678B2

公开(公告)日：2015-06-30

申请号：US14177527

申请日：2014-02-11

Applicant: Tessera, Inc.

Inventor： Andrey Grinman ,  David Ovrutsky ,  Charles Rosenstein ,  Vage Oganesian

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/556 ,  H01L25/10

CPC classification number: H01L23/3128 ,  H01L23/29 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/556 ,  H01L24/17 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16148 ,  H01L2224/274 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1058 ,  H01L2225/1064 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/1436 ,  H01L2924/3025 ,  H01L2924/00

Abstract: A chip-sized, wafer level packaged device including a portion of a semiconductor wafer including a device, at least one packaging layer containing silicon and formed over the device, a first ball grid array formed over a surface of the at least one packaging layer and being electrically connected to the device and a second ball grid array formed over a surface of the portion of the semiconductor wafer and being electrically connected to the device.

Abstract translation: 一种芯片尺寸的晶片级封装器件，其包括半导体晶片的一部分，其包括器件，至少一个包含硅并且形成在器件上的封装层，形成在所述至少一个封装层的表面上的第一球栅阵列;以及 电连接到所述装置，以及形成在所述半导体晶片的所述部分的表面上并且电连接到所述装置的第二球栅阵列。

公开(公告)号：US20130273693A1

公开(公告)日：2013-10-17

申请号：US13914896

申请日：2013-06-11

Applicant: Tessera, Inc.

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Vage Oganesian ,  David Ovrutsky ,  Laura Wills Mirkarimi

IPC: H01L25/00

CPC classification number: H01L21/78 ,  H01L21/6835 ,  H01L23/5382 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68377 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

Abstract: A microelectronic assembly includes first and second stacked microelectronic elements, each having spaced apart traces extending along a front face and beyond at least a first edge thereof. An insulating region can contact the edges of each microelectronic element and at least portions of the traces of each microelectronic element extending beyond the respective first edges. The insulating region can define first and second side surfaces adjacent the first and second edges of the microelectronic elements. A plurality of spaced apart openings can extend along a side surface of the microelectronic assembly. Electrical conductors connected with respective traces can have portions disposed in respective openings and extending along the respective openings. The electrical conductors may extend to pads or solder balls overlying a face of one of the microelectronic elements.

公开(公告)号：US09548254B2

公开(公告)日：2017-01-17

申请号：US14753895

申请日：2015-06-29

Applicant: Tessera, Inc.

Inventor： Andrey Grinman ,  David Ovrutsky ,  Charles Rosenstein ,  Vage Oganesian

IPC: H01L23/50 ,  H01L23/31 ,  H01L23/556 ,  H01L25/10 ,  H01L23/29 ,  H01L23/00 ,  H01L25/065 ,  H01L23/498

CPC classification number: H01L23/3128 ,  H01L23/29 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/556 ,  H01L24/17 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16148 ,  H01L2224/274 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1058 ,  H01L2225/1064 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/1436 ,  H01L2924/3025 ,  H01L2924/00

Abstract: A chip-sized, wafer level packaged device including a portion of a semiconductor wafer including a device, at least one packaging layer containing silicon and formed over the device, a first ball grid array formed over a surface of the at least one packaging layer and being electrically connected to the device and a second ball grid array formed over a surface of the portion of the semiconductor wafer and being electrically connected to the device.

Abstract translation: 一种芯片尺寸的晶片级封装器件，其包括半导体晶片的一部分，其包括器件，至少一个包含硅并且形成在器件上的封装层，形成在所述至少一个封装层的表面上的第一球栅阵列;以及 电连接到所述装置，以及形成在所述半导体晶片的所述部分的表面上并且电连接到所述装置的第二球栅阵列。

公开(公告)号：US08883562B2

公开(公告)日：2014-11-11

申请号：US13911555

申请日：2013-06-06

Applicant: Tessera, Inc.

Inventor： Belgacem Haba ,  Giles Humpston ,  David Ovrutsky ,  Laura Wills Mirkarimi

IPC: H01L21/00 ,  H01L23/00 ,  H01L21/50 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L21/50 ,  H01L24/24 ,  H01L24/96 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/04105 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/00

Abstract: A stacked microelectronic unit is provided which can include a plurality of vertically stacked microelectronic elements each having a front surface, contacts exposed at the front surface, a rear surface and edges extending between the front and rear surfaces. Traces connected with the contacts may extend along the front surfaces towards edges of the microelectronic elements with the rear surface of at least one of the stacked microelectronic elements being adjacent to a top face of the microelectronic unit. A plurality of conductors may extend along edges of the microelectronic elements from the traces to the top face. The conductors may be conductively connected with unit contacts such that the unit contacts overlie the rear surface of the at least one microelectronic element adjacent to the top face.

Abstract translation: 提供堆叠的微电子单元，其可以包括多个垂直堆叠的微电子元件，每个微电子元件具有前表面，暴露在前表面的触点，后表面和在前表面和后表面之间延伸的边缘。 与触点连接的迹线可以沿着前表面朝向微电子元件的边缘延伸，其中至少一个堆叠的微电子元件的后表面与微电子单元的顶面相邻。 多个导体可以沿着微电子元件的边缘从迹线延伸到顶面。 导体可以与单元触点导电连接，使得单元接触覆盖邻近顶面的至少一个微电子元件的后表面。