Abstract:
A device may include one or more processors. The device may receive program code that identifies operations to be performed with regard to a data set to determine an output value. The device may identify a plurality of read operations corresponding to the operations. The plurality of read operations may be performed to obtain respective inputs of the operations. The device may generate a first data structure that identifies the operations and the plurality of read operations. The device may identify two or more operations, of the operations, that receive a particular input. The device may generate a second data structure that includes a combined operation. The combined operation may be generated based on the two or more operations, and may be associated with fewer read operations than the two or more operations. The device may determine the output value based on the second data structure.
Abstract:
A device may receive information that identifies a set of input frequencies and a set of output frequencies associated with a circuit. The device may determine, based on the set of input frequencies and the set of output frequencies, a set of fundamental frequencies associated with the circuit, and a harmonic order corresponding to one or more fundamental frequencies in the set of fundamental frequencies, where the one or more fundamental frequencies and the corresponding harmonic orders are based on a quantity of harmonic frequencies associated with the circuit. The device may output or store the one or more fundamental frequencies and the corresponding harmonic orders.