公开(公告)号：US20130233602A1

公开(公告)日：2013-09-12

申请号：US13416158

申请日：2012-03-09

Applicant: Ting-Hao Lin ,  Yu-Hui Wu

Inventor： Ting-Hao Lin ,  Yu-Hui Wu

IPC: H05K1/09

CPC classification number: H05K3/243 ,  H01L2224/13111 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/81444 ,  H01L2224/85444 ,  H05K3/24 ,  H05K2201/0341 ,  H01L2924/00014

Abstract: A surface treatment structure formed on a circuit pattern on a printed circuit board is provided, which includes a first gold layer, a palladium layer, and a second gold layer stacked from bottom to top, respectively, or includes a palladium layer, and a second gold layer stacked from bottom to top, respectively. The palladium layer is used to prevent the diffusion of the copper ions from the circuit pattern. Only a thin surface treatment structure of the circuit pattern of the present invention is required to achieve excellent wire bonding, so that the overall thickness is reduced, and the manufacture cost is also reduced. Furthermore, the uniformness of palladium is better than that of nickel, and thereby the surface treatment structure of the circuit pattern of the present invention is suitably used for manufacturing the fine-line circuits, thereby having a wider industrial applicability.

Abstract translation: 提供了形成在印刷电路板上的电路图案上的表面处理结构，其包括分别从底部至顶部堆叠的第一金层，钯层和第二金层，或包括钯层，第二金层 金层分别从底部到顶部堆叠。 钯层用于防止铜离子从电路图案扩散。 需要本发明的电路图形的薄的表面处理结构来实现优良的引线接合，从而减小总体厚度，并且制造成本也降低。 此外，钯的均匀性优于镍，因此本发明的电路图案的表面处理结构适用于制造细线电路，从而具有更广的工业实用性。