公开(公告)号：US11978631B2

公开(公告)日：2024-05-07

申请号：US17116911

申请日：2020-12-09

Applicant: Tokyo Electron Limited

Inventor： Junling Sun ,  Katie Lutker-Lee ,  Angelique Raley ,  Andrew Metz

IPC: H01L21/033 ,  H01L21/02 ,  H01L21/027 ,  H01L21/311 ,  H01L21/66 ,  H01L21/768

CPC classification number: H01L21/0337 ,  H01L21/0338 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76816 ,  H01L22/12 ,  H01L22/20 ,  H01L21/02063 ,  H01L21/0276 ,  H01L21/0279

Abstract: A method for forming a device includes forming a hole pattern in a resist layer disposed over a substrate. The substrate includes contact regions disposed over a major surface of the substrate and a dielectric layer disposed over the contact regions. The resist layer is disposed over the dielectric layer and the hole pattern includes through openings in the resist layer that are aligned with the contact regions. The through openings include a first through opening having a first critical dimension and a second through opening having a second critical dimension greater than the first critical dimension. The method includes modifying the hole pattern by depositing a material including silicon within the through openings by exposing the hole pattern to a first plasma generated from a gas mixture including SiCl4 and hydrogen, and then etching holes in the dielectric layer through the modified hole pattern, exposing the contact regions.

公开(公告)号：US20210343502A1

公开(公告)日：2021-11-04

申请号：US17176342

申请日：2021-02-16

Applicant: Tokyo Electron Limited

Inventor： Junling Sun ,  Andrew Metz ,  Angelique Raley

IPC: H01J37/32 ,  H01L21/311

Abstract: Systems and methods are provided herein for etch features on a substrate, while maintaining a near-unity critical dimension (CD) shrink ratio. The features etched may include, but are not limited to contacts, vias, etc. More specifically, the techniques described herein use a pulsed plasma to control the polymer build-up ratio between the major CD and minor CD of the feature, and thus, control the CD shrink ratio when etching features having substantially different major and minor dimensions. The CD shrink ratio is controlled by selecting or adjusting one or more operational parameters (e.g., duty cycle, RF power, etch chemistry, etc.) of the plasma etch process(es) to control the amount of polymer build-up at the major and minor dimensions of the feature.

公开(公告)号：US11495436B2

公开(公告)日：2022-11-08

申请号：US17176342

申请日：2021-02-16

Applicant: Tokyo Electron Limited

Inventor： Junling Sun ,  Andrew Metz ,  Angelique Raley

IPC: H01J37/32 ,  H01L21/311

Abstract: Systems and methods are provided herein for etch features on a substrate, while maintaining a near-unity critical dimension (CD) shrink ratio. The features etched may include, but are not limited to contacts, vias, etc. More specifically, the techniques described herein use a pulsed plasma to control the polymer build-up ratio between the major CD and minor CD of the feature, and thus, control the CD shrink ratio when etching features having substantially different major and minor dimensions. The CD shrink ratio is controlled by selecting or adjusting one or more operational parameters (e.g., duty cycle, RF power, etch chemistry, etc.) of the plasma etch process(es) to control the amount of polymer build-up at the major and minor dimensions of the feature.

公开(公告)号：US11482454B2

公开(公告)日：2022-10-25

申请号：US17177379

申请日：2021-02-17

Applicant: Tokyo Electron Limited

Inventor： Junling Sun ,  Lior Huli ,  Andrew Metz ,  Angelique Raley

IPC: H01L21/768 ,  H01L21/3105 ,  H01L21/311

Abstract: Methods and improved process flows are provided herein for forming self-aligned contacts using spin-on silicon carbide (SiC). More specifically, the disclosed methods and process flows form self-aligned contacts by using spin-on SiC as a cap layer for at least one other structure, instead of depositing a SiC layer via plasma vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD), etc. The other structure may be a source and drain contact made through the use of a trench conductor. By utilizing spin-on SiC as a cap layer material, the disclosed methods and process flows avoid problems that typically occur when SiC is deposited, for example by CVD, and subsequently planarized. As such, the disclosed methods and process flows improve upon conventional methods and process flows for forming self-aligned contacts by reducing defectivity and improving yield.

公开(公告)号：US20200051832A1

公开(公告)日：2020-02-13

申请号：US16533354

申请日：2019-08-06

Applicant: Tokyo Electron Limited

Inventor： Angelique Raley ,  Andrew Metz ,  Cory Wajda ,  Junling Sun

IPC: H01L21/3213 ,  H01L21/56 ,  H01L21/311

Abstract: A process is provided in which etched layer(s) are protected from residues or defects caused by or resulting from exposure to atmospheric conditions. Protection is provided through the formation of an encapsulation layer post etch. In one embodiment, the encapsulation is provided by a thin layer formed in an atomic layer deposition (ALD) process. The thin layer prevents the etched layer(s) from exposure to air. This encapsulation process may take place after the etch process thus allowing for substrates to be subsequently exposed to atmospheric conditions with little or no queue time constraints being needed for staging subsequent wet clean processing steps. In one embodiment, the encapsulation process may be performed with no vacuum break between the etch process and the encapsulation process. In one embodiment, the encapsulation film is compatible with subsequent wet process steps and can be removed during this wet process steps without adverse effects.

公开(公告)号：US20220262679A1

公开(公告)日：2022-08-18

申请号：US17177379

申请日：2021-02-17

Applicant: Tokyo Electron Limited

Inventor： Junling Sun ,  Lior Huli ,  Andrew Metz ,  Angelique Raley

IPC: H01L21/768 ,  H01L21/311 ,  H01L21/3105

Abstract: Methods and improved process flows are provided herein for forming self-aligned contacts using spin-on silicon carbide (SiC). More specifically, the disclosed methods and process flows form self-aligned contacts by using spin-on SiC as a cap layer for at least one other structure, instead of depositing a SiC layer via plasma vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD), etc. The other structure may be a source and drain contact made through the use of a trench conductor. By utilizing spin-on SiC as a cap layer material, the disclosed methods and process flows avoid problems that typically occur when SiC is deposited, for example by CVD, and subsequently planarized. As such, the disclosed methods and process flows improve upon conventional methods and process flows for forming self-aligned contacts by reducing defectivity and improving yield.

公开(公告)号：US12080599B2

公开(公告)日：2024-09-03

申请号：US17959557

申请日：2022-10-04

Applicant: Tokyo Electron Limited

Inventor： Junling Sun ,  Lior Huli ,  Andrew Metz ,  Angelique Raley

IPC: H01L21/768 ,  H01L21/3105 ,  H01L21/311

CPC classification number: H01L21/76897 ,  H01L21/31051 ,  H01L21/31116 ,  H01L21/76832

Abstract: Methods and improved process flows are provided herein for forming self-aligned contacts using spin-on silicon carbide (SiC). More specifically, the disclosed methods and process flows form self-aligned contacts by using spin-on SiC as a cap layer for at least one other structure, instead of depositing a SiC layer via plasma vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD), etc. The other structure may be a source and drain contact made through the use of a trench conductor. By utilizing spin-on SiC as a cap layer material, the disclosed methods and process flows avoid problems that typically occur when SiC is deposited, for example by CVD, and subsequently planarized. As such, the disclosed methods and process flows improve upon conventional methods and process flows for forming self-aligned contacts by reducing defectivity and improving yield.

公开(公告)号：US20230044047A1

公开(公告)日：2023-02-09

申请号：US17959557

申请日：2022-10-04

Applicant: Tokyo Electron Limited

Inventor： Junling Sun ,  Lior Huli ,  Andrew Metz ,  Angelique Raley

IPC: H01L21/768 ,  H01L21/3105 ,  H01L21/311

Abstract: Methods and improved process flows are provided herein for forming self-aligned contacts using spin-on silicon carbide (SiC). More specifically, the disclosed methods and process flows form self-aligned contacts by using spin-on SiC as a cap layer for at least one other structure, instead of depositing a SiC layer via plasma vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD), etc. The other structure may be a source and drain contact made through the use of a trench conductor. By utilizing spin-on SiC as a cap layer material, the disclosed methods and process flows avoid problems that typically occur when SiC is deposited, for example by CVD, and subsequently planarized. As such, the disclosed methods and process flows improve upon conventional methods and process flows for forming self-aligned contacts by reducing defectivity and improving yield.

公开(公告)号：US20220181152A1

公开(公告)日：2022-06-09

申请号：US17116911

申请日：2020-12-09

Applicant: Tokyo Electron Limited

Inventor： Junling Sun ,  Katie Lutker-Lee ,  Angelique Raley ,  Andrew Metz

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/66 ,  H01L21/768

Abstract: A method for forming a device includes forming a hole pattern in a resist layer disposed over a substrate. The substrate includes contact regions disposed over a major surface of the substrate and a dielectric layer disposed over the contact regions. The resist layer is disposed over the dielectric layer and the hole pattern includes through openings in the resist layer that are aligned with the contact regions. The through openings include a first through opening having a first critical dimension and a second through opening having a second critical dimension greater than the first critical dimension. The method includes modifying the hole pattern by depositing a material including silicon within the through openings by exposing the hole pattern to a first plasma generated from a gas mixture including SiCl4 and hydrogen, and then etching holes in the dielectric layer through the modified hole pattern, exposing the contact regions.

公开(公告)号：US10950460B2

公开(公告)日：2021-03-16

申请号：US16533354

申请日：2019-08-06

Applicant: Tokyo Electron Limited

Inventor： Angelique Raley ,  Andrew Metz ,  Cory Wajda ,  Junling Sun

IPC: H01L21/3213 ,  H01L21/56 ,  H01L21/311 ,  H01L21/02

Abstract: A process is provided in which etched layer(s) are protected from residues or defects caused by or resulting from exposure to atmospheric conditions. Protection is provided through the formation of an encapsulation layer post etch. In one embodiment, the encapsulation is provided by a thin layer formed in an atomic layer deposition (ALD) process. The thin layer prevents the etched layer(s) from exposure to air. This encapsulation process may take place after the etch process thus allowing for substrates to be subsequently exposed to atmospheric conditions with little or no queue time constraints being needed for staging subsequent wet clean processing steps. In one embodiment, the encapsulation process may be performed with no vacuum break between the etch process and the encapsulation process. In one embodiment, the encapsulation film is compatible with subsequent wet process steps and can be removed during this wet process steps without adverse effects.