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公开(公告)号：US20190280106A1
公开(公告)日：2019-09-12
申请号：US16404749
申请日：2019-05-07
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yu-Ying Lin , Yi-Liang Ye , Sung-Yuan Tsai , Chun-Wei Yu , Yu-Ren Wang , Zhen Wu , Tai-Yen Lin
IPC: H01L29/66 , H01L21/768 , H01L21/3065 , H01L21/306 , H01L21/285 , H01L29/08 , H01L29/78 , H01L21/265
Abstract: A method for fabricating semiconductor device includes the steps of: forming a first gate structure on a substrate; performing a first etching process to form a recess adjacent to the first gate structure; performing an ion implantation process to form an amorphous layer directly under the recess; performing a second etching process to remove the amorphous layer; and forming an epitaxial layer in the recess.
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公开(公告)号：US10332981B1
公开(公告)日：2019-06-25
申请号：US15943657
申请日：2018-04-02
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yu-Ying Lin , Yi-Liang Ye , Sung-Yuan Tsai , Chun-Wei Yu , Yu-Ren Wang , Zhen Wu , Tai-Yen Lin
IPC: H01L21/00 , H01L29/66 , H01L21/265 , H01L21/3065 , H01L21/306 , H01L21/768 , H01L29/78 , H01L29/08 , H01L21/285 , H01L21/02
Abstract: A method for fabricating semiconductor device includes the steps of: forming a first gate structure on a substrate; performing a first etching process to form a recess adjacent to the first gate structure; performing an ion implantation process to form an amorphous layer directly under the recess; performing a second etching process to remove the amorphous layer; and forming an epitaxial layer in the recess.
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公开(公告)号：US20210280717A1
公开(公告)日：2021-09-09
申请号：US17330443
申请日：2021-05-26
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Kuang-Hsiu Chen , Sung-Yuan Tsai , Chi-Hsuan Tang , Chun-Wei Yu , Yu-Ren Wang
IPC: H01L29/78 , H01L29/08 , H01L29/36 , H01L29/66 , H01L29/423
Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure and an epitaxial structure. The gate structure is disposed on the substrate, and the epitaxial structure is disposed in the substrate, at one side of the gate structure. The epitaxial structure includes a portion being protruded from a top surface of the substrate, and the portion includes a discontinuous sidewall, with a distance between a turning point of the discontinuous sidewalls and the gate structure being a greatest distance between the epitaxial structure and the gate structure.
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公开(公告)号：US20200098916A1
公开(公告)日：2020-03-26
申请号：US16172856
申请日：2018-10-28
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Kuang-Hsiu Chen , Sung-Yuan Tsai , Chi-Hsuan Tang , Kai-Hsiang Wang , Chao-Nan Chen , Shi-You Liu , Chun-Wei Yu , Yu-Ren Wang
IPC: H01L29/78 , H01L29/165 , H01L29/66 , H01L21/265
Abstract: A semiconductor device is disclosed. The semiconductor device comprises a substrate, a gate structure disposed on the substrate, a spacer disposed on the substrate and covering a sidewall of the gate structure, an air gap sandwiched between the spacer and the substrate, and a source/drain region disposed in the substrate and having a faceted surface exposed from the substrate, wherein the faceted surface borders the substrate on a boundary between the air gap and the substrate.
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公开(公告)号：US20230352587A1
公开(公告)日：2023-11-02
申请号：US18218098
申请日：2023-07-04
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Kuang-Hsiu Chen , Sung-Yuan Tsai , Chi-Hsuan Tang , Chun-Wei Yu , Yu-Ren Wang
IPC: H01L29/78 , H01L29/08 , H01L29/36 , H01L29/66 , H01L29/423
CPC classification number: H01L29/7848 , H01L29/0847 , H01L29/36 , H01L29/66575 , H01L29/6656 , H01L29/6653 , H01L29/42364
Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure and an epitaxial structure. The gate structure is disposed on the substrate, and the epitaxial structure is disposed in the substrate, at one side of the gate structure. The epitaxial structure includes a portion being protruded from a top surface of the substrate, and the portion includes a discontinuous sidewall, with a distance between a turning point of the discontinuous sidewalls and the gate structure being a greatest distance between the epitaxial structure and the gate structure.
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Patent Agency Ranking
公开(公告)号：US20220365433A1
公开(公告)日：2022-11-17
申请号：US17316736
申请日：2021-05-11
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hao-Hsuan Chang , Da-Jun Lin , Yao-Hsien Chung , Ting-An Chien , Bin-Siang Tsai , Chih-Wei Chang , Shih-Wei Su , Hsu Ting , Sung-Yuan Tsai
Abstract: A fabricating method of reducing photoresist footing includes providing a silicon nitride layer. Later, a fluorination process is performed to graft fluoride ions onto a top surface of the silicon nitride layer. After the fluorination process, a photoresist is formed to contact the top surface of the silicon nitride layer. Finally, the photoresist is patterned to remove at least part of the photoresist contacting the silicon nitride layer.
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公开(公告)号：US10700202B2
公开(公告)日：2020-06-30
申请号：US16172856
申请日：2018-10-28
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Kuang-Hsiu Chen , Sung-Yuan Tsai , Chi-Hsuan Tang , Kai-Hsiang Wang , Chao-Nan Chen , Shi-You Liu , Chun-Wei Yu , Yu-Ren Wang
IPC: H01L29/76 , H01L29/78 , H01L29/165 , H01L29/66 , H01L21/265
Abstract: A semiconductor device is disclosed. The semiconductor device comprises a substrate, a gate structure disposed on the substrate, a spacer disposed on the substrate and covering a sidewall of the gate structure, an air gap sandwiched between the spacer and the substrate, and a source/drain region disposed in the substrate and having a faceted surface exposed from the substrate, wherein the faceted surface borders the substrate on a boundary between the air gap and the substrate.
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公开(公告)号：US11762293B2
公开(公告)日：2023-09-19
申请号：US17316736
申请日：2021-05-11
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hao-Hsuan Chang , Da-Jun Lin , Yao-Hsien Chung , Ting-An Chien , Bin-Siang Tsai , Chih-Wei Chang , Shih-Wei Su , Hsu Ting , Sung-Yuan Tsai
CPC classification number: G03F7/0755 , G03F7/2043 , C23C16/345
Abstract: A fabricating method of reducing photoresist footing includes providing a silicon nitride layer. Later, a fluorination process is performed to graft fluoride ions onto a top surface of the silicon nitride layer. After the fluorination process, a photoresist is formed to contact the top surface of the silicon nitride layer. Finally, the photoresist is patterned to remove at least part of the photoresist contacting the silicon nitride layer.
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公开(公告)号：US11735661B2
公开(公告)日：2023-08-22
申请号：US17330443
申请日：2021-05-26
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Kuang-Hsiu Chen , Sung-Yuan Tsai , Chi-Hsuan Tang , Chun-Wei Yu , Yu-Ren Wang
IPC: H01L29/78 , H01L29/08 , H01L29/36 , H01L29/66 , H01L29/423
CPC classification number: H01L29/7848 , H01L29/0847 , H01L29/36 , H01L29/42364 , H01L29/6653 , H01L29/6656 , H01L29/66575
Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure and an epitaxial structure. The gate structure is disposed on the substrate, and the epitaxial structure is disposed in the substrate, at one side of the gate structure. The epitaxial structure includes a portion being protruded from a top surface of the substrate, and the portion includes a discontinuous sidewall, with a distance between a turning point of the discontinuous sidewalls and the gate structure being a greatest distance between the epitaxial structure and the gate structure.
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公开(公告)号：US11049971B2
公开(公告)日：2021-06-29
申请号：US16205233
申请日：2018-11-30
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Kuang-Hsiu Chen , Sung-Yuan Tsai , Chi-Hsuan Tang , Chun-Wei Yu , Yu-Ren Wang
IPC: H01L29/78 , H01L29/08 , H01L29/36 , H01L29/66 , H01L29/423
Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure and an epitaxial structure. The gate structure is disposed on the substrate, and the epitaxial structure is disposed in the substrate, at one side of the gate structure. The epitaxial structure includes a portion being protruded from a top surface of the substrate, and the portion includes a discontinuous sidewall, with a distance between a turning point of the discontinuous sidewalls and the gate structure being a greatest distance between the epitaxial structure and the gate structure.
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