公开(公告)号：US10813231B2

公开(公告)日：2020-10-20

申请号：US16592748

申请日：2019-10-03

Applicant: Unimicron Technology Corp.

Inventor： Po-Hsuan Liao ,  Wen-Fang Liu

IPC: H05K1/11 ,  H05K1/14 ,  H05K3/00 ,  H05K3/10 ,  H01L21/02 ,  H01L21/48 ,  H01L21/56 ,  H01L21/67 ,  H01L21/68 ,  H01L23/31 ,  H01L23/498 ,  H05K3/38 ,  H05K1/03 ,  H05K3/46

Abstract: The present disclosure relates to a method for manufacturing a circuit board. The method for manufacturing the circuit board includes forming a patterned first dielectric layer on a substrate; forming an adhesive layer on the patterned first dielectric layer; forming a second dielectric layer on the adhesive layer; and patterning the second dielectric layer and the adhesive layer.

公开(公告)号：US10477701B2

公开(公告)日：2019-11-12

申请号：US15836937

申请日：2017-12-11

Applicant: Unimicron Technology Corp.

Inventor： Po-Hsuan Liao ,  Wen-Fang Liu

IPC: H05K1/11 ,  H05K1/18 ,  H01L21/02 ,  H01L21/31 ,  H01L21/44 ,  H01L21/48 ,  H01L21/70 ,  H01L21/768 ,  H01L21/4763 ,  H01L23/00 ,  H01L23/48 ,  H01L23/52 ,  H05K3/38 ,  H05K1/03 ,  H05K3/00 ,  H05K3/10

Abstract: A circuit board includes a substrate, a first dielectric layer, an adhesive layer, a second dielectric layer, and a conductive line. The first dielectric layer is disposed on the substrate. The adhesive layer is bonded to the first dielectric layer and has at least one through hole. The through hole has an inner wall. The second dielectric layer is disposed on the adhesive layer and has a second through hole communicated with the first through hole. The conductive line is located in the second through hole of the second dielectric layer and is in contact with the inner wall of the adhesive layer.

公开(公告)号：US11322377B2

公开(公告)日：2022-05-03

申请号：US17016356

申请日：2020-09-09

Applicant: Unimicron Technology Corp.

Inventor： Po-Hsuan Liao

IPC: H01L21/673 ,  H01L21/02 ,  H01L21/67 ,  H05K3/46 ,  H05K3/38

Abstract: A stacking structure is applicable to manufacturing a circuit board. The stacking structure includes a transferring layer and a dielectric layer disposed on the transferring layer. The transferring layer includes a substrate and a thin film disposed on the substrate and having a plurality of recess structures thereon. The recess structures are connected as a single piece and bottom portions and top portions of the recess structures are configured to arrange in a staggered manner to form a multi-dimensional arrangement. At least a portion of the dielectric layer being is located in the recess structures, such that the dielectric layer is at least embedded with the recess structures.

公开(公告)号：US10729014B2

公开(公告)日：2020-07-28

申请号：US16543646

申请日：2019-08-19

Applicant: Unimicron Technology Corp.

Inventor： Po-Hsuan Liao

IPC: H05K3/10 ,  H05K1/02 ,  H05K3/46 ,  H05K1/11 ,  H05K3/00

Abstract: A method for manufacturing a circuit board includes forming a patterned first dielectric layer on a substrate; forming a first adhesive layer on the patterned first dielectric layer; forming a second dielectric layer on the first adhesive layer; patterning the second dielectric layer to expose a portion of a top surface of the first adhesive layer opposite to the substrate; and filling at least the patterned second dielectric layer with a conductive material, such that the conductive material is in contact with the top surface of the first adhesive layer.

公开(公告)号：US10468570B2

公开(公告)日：2019-11-05

申请号：US15880561

申请日：2018-01-26

Applicant: Unimicron Technology Corp.

Inventor： Po-Hsuan Liao ,  Zong-Hua Li

IPC: H01L33/62 ,  H01L23/498 ,  H01L21/48 ,  H01L23/13 ,  H01L33/58 ,  H01L33/52

Abstract: A circuit board includes a base plate, a first circuit layer, a first dielectric layer, and a light emitting element. The first circuit layer is disposed on the base plate. The first dielectric layer is disposed on the base plate and has plural openings. The first circuit layer is embedded in the first dielectric layer and exposes the openings. A Young's modulus of the first dielectric layer is greater than a Young's modulus of the base plate. The light emitting element is electrically connected to the first circuit layer through the openings.

公开(公告)号：US20180160543A1

公开(公告)日：2018-06-07

申请号：US15430556

申请日：2017-02-13

Applicant: Unimicron Technology Corp.

Inventor： Po-Hsuan Liao ,  Chi-Min Chang ,  Cheng-Po Yu

IPC: H05K3/20 ,  H05K3/38 ,  H05K1/11

CPC classification number: H05K3/20 ,  H05K3/4644 ,  H05K2201/09727 ,  H05K2201/09918 ,  H05K2203/0522 ,  H05K2203/107 ,  H05K2203/1476

Abstract: A manufacturing method of a circuit board including the following steps is provided. A first patterned circuit layer is formed on a surface of a circuit substrate, and the first patterned circuit layer exposes a portion of the surface of the circuit substrate. A patterned glue layer is formed on the portion of the surface of the circuit substrate exposed by the first patterned circuit layer. A second patterned circuit layer is transfer-printed on the corresponding patterned glue layer. In addition, a structure of the circuit board is also mentioned.

公开(公告)号：US10804126B2

公开(公告)日：2020-10-13

申请号：US15815719

申请日：2017-11-17

Applicant: Unimicron Technology Corp.

Inventor： Po-Hsuan Liao

IPC: H01L21/673 ,  H01L21/02 ,  H01L21/67 ,  H05K3/46 ,  H05K3/38

Abstract: A method for manufacturing a circuit board includes forming recess structures on a transferring layer; forming a dielectric layer on the transferring layer to form a stacking structure, in which the dielectric layer is at least embedded with the recess structures; bonding the stacking structure a base board by pressing, such that the dielectric layer is in contact with the base board; patterning the dielectric layer, including performing an exposure process on the stacking structure through the transferring layer; and after the exposure process is finished, removing the transferring layer.

公开(公告)号：US10433426B2

公开(公告)日：2019-10-01

申请号：US15836941

申请日：2017-12-11

Applicant: Unimicron Technology Corp.

Inventor： Po-Hsuan Liao

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/10 ,  H05K3/00 ,  H05K3/46

Abstract: A circuit board includes a substrate, a first dielectric layer, an adhesive layer, a second dielectric layer, and a first conductive line. The first dielectric layer is disposed on the substrate. The adhesive layer is bonded to the first dielectric layer and has a top surface opposite to the substrate. The second dielectric layer is disposed on the adhesive layer and has at least one first through hole. The first conductive line is located in the first through hole of the second dielectric layer and is in contact with the top surface of the adhesive layer.