FABRICATION METHOD OF PACKAGING SUBSTRATE HAVING EMBEDDED PASSIVE COMPONENT
    1.
    发明申请
    FABRICATION METHOD OF PACKAGING SUBSTRATE HAVING EMBEDDED PASSIVE COMPONENT 审中-公开
    具有嵌入式被动元件的封装基板的制造方法

    公开(公告)号:US20160007483A1

    公开(公告)日:2016-01-07

    申请号:US14853992

    申请日:2015-09-14

    Abstract: A carrier board having two opposite surfaces is provided and a releasing film and a metal layer are formed on the two opposite surfaces respectively. Each metal layer formed with positioning pads is covered with a first hot-melt-dielectric layer where a passive component is disposed. The passive component has upper and lower surfaces each having electrode pads. Each first hot-melt-dielectric layer is disposed on a core board having a cavity to receive the passive component. A second hot-melt-dielectric layer is stacked on each core board. The first and second hot-melt-dielectric layers are heat pressed to form two dielectric layer units each having a top surface and a bottom surface. The carrier board and the releasing films are removed to separate the dielectric layer units. Wiring layers are formed on each top surface and each bottom surface and electrically connected to the electrode pads of the upper and lower surfaces respectively.

    Abstract translation: 提供具有两个相对表面的载体板,并且在两个相对的表面上分别形成剥离膜和金属层。 形成有定位焊盘的每个金属层被设置有无源部件的第一热熔电介质层覆盖。 无源部件具有各自具有电极焊盘的上表面和下表面。 每个第一热熔电介质层设置在具有空腔的芯板上以接收无源部件。 在每个芯板上堆叠第二热熔电介质层。 第一和第二热熔介电层被热压以形成两个具有顶表面和底表面的电介质层单元。 去除载体板和释放膜以分离介电层单元。 接线层形成在每个顶表面和每个底表面上并分别电连接到上表面和下表面的电极焊盘。

    Fabrication method of packaging substrate having embedded passive component

    公开(公告)号:US10219390B2

    公开(公告)日:2019-02-26

    申请号:US14853992

    申请日:2015-09-14

    Abstract: A carrier board having two opposite surfaces is provided and a releasing film and a metal layer are formed on the two opposite surfaces respectively. Each metal layer formed with positioning pads is covered with a first hot-melt-dielectric layer where a passive component is disposed. The passive component has upper and lower surfaces each having electrode pads. Each first hot-melt-dielectric layer is disposed on a core board having a cavity to receive the passive component. A second hot-melt-dielectric layer is stacked on each core board. The first and second hot-melt-dielectric layers are heat pressed to form two dielectric layer units each having a top surface and a bottom surface. The carrier board and the releasing films are removed to separate the dielectric layer units. Wiring layers are formed on each top surface and each bottom surface and electrically connected to the electrode pads of the upper and lower surfaces respectively.

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