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公开(公告)号:US20160023900A1
公开(公告)日:2016-01-28
申请号:US14442011
申请日:2013-11-11
Applicant: WACOM
Inventor: Masaki KUSUHARA
IPC: C01B13/11 , C23C16/34 , C25B1/13 , C23C16/54 , C23C16/515 , C23C16/505
CPC classification number: C01B13/115 , C01B13/11 , C01B2201/12 , C01B2201/22 , C01B2201/24 , C23C16/345 , C23C16/505 , C23C16/515 , C23C16/54 , C25B1/13
Abstract: In order to generate ozone, which is used for ashing and plasma cleaning, plasma generated in a decompressed chamber is conventionally used. But it is difficult to reduce the production cost of an ozone generation, because facility cost and process cost are expensive in a decompressed process. According to the present invention, ozone is generated by atmospheric pressure plasma CVD using dielectric barrier discharge generated by a plasma head where a plurality of plasma head unit members are installed in parallel to generate plasma by applying electric field or magnetic field via a dielectric member. Stable glow discharge plasma is formed even under atmospheric pressure by dielectric barrier discharge. Then, ozone can be generated under atmospheric pressure, and semiconductor device with low cost can be fabricated.
Abstract translation: 为了产生用于灰化和等离子体清洗的臭氧,通常使用在减压室中产生的等离子体。 但由于设备成本和工艺成本在减压过程中昂贵,所以难以降低臭氧发生的生产成本。 根据本发明,通过使用由等离子体头产生的介质阻挡放电,通过大气压等离子体CVD产生臭氧,其中多个等离子体头单元构件并联安装以通过经由电介质构件施加电场或磁场而产生等离子体。 通过电介质阻挡放电,甚至在大气压下形成稳定的辉光放电等离子体。 然后,可以在大气压下产生臭氧,可以制造低成本的半导体器件。
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2.
公开(公告)号:US20170309488A1
公开(公告)日:2017-10-26
申请号:US15493995
申请日:2017-04-21
Inventor: Shigeki SAKAI , Mitsue TAKAHASHI , Masaki KUSUHARA , Masayuki TODA , Masaru UMEDA , Yoshikazu SASAKI
CPC classification number: H01L29/40111 , G11C11/223 , H01L21/02181 , H01L21/02197 , H01L21/022 , H01L21/02266 , H01L21/02271 , H01L21/02337 , H01L21/02356 , H01L27/1159 , H01L29/495 , H01L29/4966 , H01L29/513 , H01L29/516 , H01L29/517 , H01L29/518 , H01L29/6684 , H01L29/78391
Abstract: [Object] To provide a FeFET and a method of its manufacture, the FeFET having a ferroelectric whose film thickness (dr) is made small and so nanofine as to range in: 59 nm
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公开(公告)号:US20180130909A1
公开(公告)日:2018-05-10
申请号:US15674813
申请日:2017-08-11
Inventor: Shigeki SAKAI , Mitsue TAKAHASHI , Masaki KUSUHARA , Masayuki TODA , Masaru UMEDA
CPC classification number: H01L29/78391 , C23C16/40 , H01L21/02197 , H01L21/02271 , H01L27/1159 , H01L29/40111 , H01L29/516 , H01L29/6684
Abstract: A ferroelectric device and a manufacturing method are provided. While holding a nonvolatile memory retention capability and a multiple rewriting endurance as the distinctive features of a ferroelectric device, the disclosed ferroelectric device is wider in memory window and more adaptively made microfiner than a conventional ferroelectric device that has used a ferroelectric mainly constituted of Sr—Bi—Ta—O as an oxide of strontium, bismuth and tantalum. Directly on or with intermediary of an insulator on a semiconductor there are layered a first ferroelectric and a conductor to form a gate stack, the first ferroelectric being mainly constituted of Sr—Ca—Bi—Ta—O as an oxide of strontium, calcium, bismuth and tantalum and being built up by a metal organic vapor deposition technique from a suitable film-forming raw material. The gate stack is heat-treated to cause the first ferroelectric to develop its ferroelectricity.
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公开(公告)号:US20190273086A1
公开(公告)日:2019-09-05
申请号:US16315784
申请日:2017-07-03
Inventor: Mitsue TAKAHASHI , Shigeki SAKAI , Masaki KUSUHARA , Masayuki TODA , Masaru UMEDA , Yoshikazu SASAKI
IPC: H01L27/1159 , H01L29/49 , H01L29/51 , H01L29/78 , H01L21/28 , H01L21/311 , H01L29/66
Abstract: A semiconductor memory element is provided including a laminated structure, in which a memory member and a conductor are superposed on a semiconductor substrate. The memory member has a bottom surface in contact with the semiconductor substrate, an upper surface in contact with the conductor, and side surfaces, which are in contact with and surrounded by a partition wall; the bottom surface of the memory member has a width of equal to or not more than 100 nm; a shortest distance between the conductor and the semiconductor substrate is twice or more of the width of the bottom surface of the memory member; the side surface of the memory member has a width, which is either the same as the width of the bottom surface and constant at any position above the bottom surface, or the widest at a position other than the bottom surface and above the bottom surface.
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公开(公告)号:US20180076008A1
公开(公告)日:2018-03-15
申请号:US15797180
申请日:2017-10-30
Applicant: WACOM
Inventor: Masaki KUSUHARA
IPC: H01J37/32 , C23C16/455 , C23C16/50 , H05H1/24 , H01L31/0216 , C23C16/34 , H01L21/02
CPC classification number: H01J37/3255 , C23C16/345 , C23C16/45563 , C23C16/45574 , C23C16/45595 , C23C16/50 , H01L21/0217 , H01L21/02274 , H01L31/02168 , H05H1/2406 , H05H2001/2418 , H05H2001/2431 , H05H2001/245 , H05H2001/2456
Abstract: Heretofore, silicon nitride film formed by low pressure plasma CVD has been used for an antireflection film of a solar battery. But it is difficult to reduce the production cost of a solar battery, because, in a low pressure process, facility cost and process cost are expensive. As disclosed, a nitride film is formed by atmospheric pressure plasma CVD using dielectric barrier discharge generated by a plasma head where a plurality of plasma head unit parts is installed in parallel to generate plasma by applying electric field or magnetic field via a dielectric member. Stable glow discharge is formed even under atmospheric pressure by dielectric barrier discharge. And nitride film deposition under atmospheric pressure and low cost production of a solar battery is materialized by using dielectric barrier discharge and by reacting different plasmas generated from plasma supply openings laying side-by-side.
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6.
公开(公告)号:US20200279927A1
公开(公告)日:2020-09-03
申请号:US16870308
申请日:2020-05-08
Inventor: Shigeki SAKAI , Mitsue TAKAHASHI , Masaki KUSUHARA , Masayuki TODA , Masaru UMEDA , Yoshikazu SASAKI
Abstract: [Object] To provide a FeFET and a method of its manufacture, the FeFET having a ferroelectric whose film thickness (dr) is made small and so nanofine as to range in: 59 nm
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公开(公告)号:US20160247932A1
公开(公告)日:2016-08-25
申请号:US14903769
申请日:2014-07-24
Inventor: Shigeki SAKAI , Mitsue TAKAHASHI , Masaki KUSUHARA , Masayuki TODA , Masaru UMEDA
CPC classification number: H01L29/78391 , C23C16/40 , H01L21/02197 , H01L21/02271 , H01L21/28291 , H01L27/1159 , H01L29/516 , H01L29/6684
Abstract: A ferroelectric device and a manufacturing method are provided. While holding a nonvolatile memory retention capability and a multiple rewriting endurance as the distinctive features of a ferroelectric device, the disclosed ferroelectric device is wider in memory window and more adaptively made microfiner than a conventional ferroelectric device that has used a ferroelectric mainly constituted of Sr—Bi—Ta—O as an oxide of strontium, bismuth and tantalum. Directly on or with intermediary of an insulator on a semiconductor there are layered a first ferroelectric and a conductor to form a gate stack, the first ferroelectric being mainly constituted of Sr—Ca—Bi—Ta—O as an oxide of strontium, calcium, bismuth and tantalum and being built up by a metal organic vapor deposition technique from a suitable film-forming raw material. The gate stack is heat-treated to cause the first ferroelectric to develop its ferroelectricity.
Abstract translation: 提供了一种铁电体元件及其制造方法。 在将非易失性存储器保持能力和多次重写耐久性作为铁电体器件的特征的同时,所公开的铁电体器件与使用主要由Sr-型铁电体构成的铁电体的常规铁电体器件相比,在存储窗口中更宽, Bi-Ta-O作为锶,铋和钽的氧化物。 直接在半导体上或具有中间体的半导体上的绝缘体,层叠有第一铁电体和导体以形成栅极堆叠,第一铁电体主要由作为锶,钙,锶的氧化物的Sr-Ca-Bi-Ta-O构成, 铋和钽,并由合适的成膜原料由金属有机气相沉积技术构成。 对栅极叠层进行热处理,使第一铁电体产生铁电性。
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