公开(公告)号：US20250008142A1

公开(公告)日：2025-01-02

申请号：US18828776

申请日：2024-09-09

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Jaehong JUNG ,  Juhyung SON ,  Dongcheol KIM ,  Geonjung KO ,  Jinsam KWAK

IPC: H04N19/46 ,  H04N19/176 ,  H04N19/186 ,  H04N19/70 ,  H04N19/96

Abstract: A method for processing a video signal, the method comprising: acquiring a transform skip active flag indicating whether a transform skip flag can exist in a transform unit syntax, the transform skip flag indicating whether a transform skip is applied to a transform block included in a current block; acquiring a palette active flag indicating whether a palette mode is applied; when the transform skip active flag indicates existence of the transform skip flag in the transform unit syntax or the palette active flag indicates application of the palette mode, acquiring information related to a minimum quantization parameter which is allowed in a transform skip mode; acquiring the minimum quantization parameter on the basis of the information related to the minimum quantization parameter; correcting a quantization parameter on the basis of the acquired minimum quantization parameter; and reconstructing the current block on the basis of the corrected quantization parameter.

公开(公告)号：US20210392365A1

公开(公告)日：2021-12-16

申请号：US17460117

申请日：2021-08-27

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC. ,  HUMAX CO., LTD.

Inventor： Geonjung KO ,  Dongcheol KIM ,  Juhyung SON ,  Jaehong JUNG ,  Jinsam KWAK

IPC: H04N19/513 ,  H04N19/53 ,  H04N19/57

Abstract: A video signal decoding device comprising a processor, wherein the processor is configured to: obtain reference samples corresponding to a first side of a current block and reference samples corresponding to a second side of the current block, obtain a direct current (DC) value for prediction of the current block based on a reference sample set comprising at least some of the reference samples corresponding to the first side and the reference samples corresponding to the second side, and reconstruct the current block based on the DC value.

公开(公告)号：US20210289197A1

公开(公告)日：2021-09-16

申请号：US17333887

申请日：2021-05-28

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC. ,  HUMAX CO., LTD.

Inventor： Geonjung KO ,  Dongcheol KIM ,  Juhyung SON ,  Jaehong JUNG ,  Jinsam KWAK

IPC: H04N19/105 ,  H04N19/132 ,  H04N19/159 ,  H04N19/46 ,  H04N19/82 ,  H04N19/176

Abstract: A video signal processing method comprises: a step for deriving an intra prediction mode of a current block; a step for constructing a reference sample around the current block; a step for generating a prediction sample of the current block by using the reference sample on the basis of the intra prediction mode; and a step for restoring the current block on the basis of the prediction sample. The step for generating the prediction sample may comprise: a step for setting a filter flag value which specifies a filter coefficient of an interpolation filter applied to the reference sample on the basis of the width and height of the current block; and a step for performing filtering on the reference sample by using the interpolation filter having the filter coefficient specified by the filter flag.

公开(公告)号：US20210266583A1

公开(公告)日：2021-08-26

申请号：US17314373

申请日：2021-05-07

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC. ,  HUMAX CO., LTD.

Inventor： Jaehong JUNG ,  Dongcheol KIM ,  Geonjung KO ,  Juhyung SON ,  Jinsam KWAK

IPC: H04N19/513 ,  H04N19/105 ,  H04N19/132 ,  H04N19/137 ,  H04N19/176

Abstract: Disclosed is a video signal processing method comprising the steps of: acquiring a merge index which indicates a candidate for prediction of a current block among a plurality of candidates for the prediction of the current block, which are included in a merge candidate list; acquiring motion information of the current block on the basis of motion information corresponding to the candidate indicated by the merge index; when the motion information of the current block includes a plurality of motion vectors corresponding to a list of different reference pictures, comparing picture order count (POC) differences between each of the reference pictures corresponding to the plurality of motion vectors and the current picture including the current block; correcting the plurality of motion vectors on the basis of a result of the comparison; and reconstructing the current block on the basis of the plurality of corrected motion vectors.

公开(公告)号：US20210250622A1

公开(公告)日：2021-08-12

申请号：US17244083

申请日：2021-04-29

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC. ,  HUMAX CO., LTD.

Inventor： Jaehong JUNG ,  Juhyung SON ,  Dongcheol KIM ,  Geonjung KO ,  Jinsam KWAK

IPC: H04N19/96 ,  H04N19/70 ,  H04N19/184 ,  H04N19/176

Abstract: A video signal processing method comprises: obtaining, from a bitstream, a skip parameter (cu_skip_flag) indicating whether a skip mode is applied to a current block; when the skip parameter indicates that a mode is not the skip mode, obtaining, from the bitstream, a merge parameter (merge_flag) indicating whether the current block is coded with a merge mode; and determining whether a coded block flag (CBF) parameter (cu_cbf), which indicates whether a syntax element related to transform is obtained from the bitstream, is obtained, according to a value of the merge parameter, wherein, when the value of the merge parameter indicates the merge mode, the CBF parameter is not obtained from the bitstream and is determined to be a preconfigured value.

公开(公告)号：US20240195954A1

公开(公告)日：2024-06-13

申请号：US18584910

申请日：2024-02-22

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Geonjung KO ,  Dongcheol KIM ,  Juhyung SON ,  Jaehong JUNG ,  Jinsam KWAK

IPC: H04N19/105 ,  H04N19/132 ,  H04N19/139 ,  H04N19/159 ,  H04N19/167 ,  H04N19/176 ,  H04N19/186 ,  H04N19/33 ,  H04N19/593

CPC classification number: H04N19/105 ,  H04N19/132 ,  H04N19/159 ,  H04N19/167 ,  H04N19/176 ,  H04N19/186 ,  H04N19/33 ,  H04N19/593 ,  H04N19/139

Abstract: A method for processing a video signal, of the present disclosure, comprising the steps of: parsing, from a bitstream, upper level merge with MVD (MMVD) activation information (sps_mmvd_enabled_flag) indicating whether the upper level MMVD including a current block is usable; parsing, from the bitstream, MMVD merge information (mmvd_merge_flag) indicating whether the MMVD is used in the current block, if the upper level MMVD activation information indicates the activation of the MMVD; parsing MMVD distance-related information (mmvd_distance_idx) and MMVD direction-related information (mmvd_direction_idx), if the MMVD merge information indicates that the MMVD is used in the current block; and obtaining MMVD information (mMvdLX) based on the MMVD distance-related information and the MMVD direction-related information, wherein the MMVD information is greater than or equal to −2{circumflex over ( )}17 and is less than or equal to 2{circumflex over ( )}17−1.

公开(公告)号：US20240048692A1

公开(公告)日：2024-02-08

申请号：US18491003

申请日：2023-10-20

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Geonjung KO ,  Dongcheol KIM ,  Juhyung SON ,  Jaehong JUNG ,  Jinsam KWAK

IPC: H04N19/105 ,  H04N19/139 ,  H04N19/176 ,  H04N19/52 ,  H04N19/70

CPC classification number: H04N19/105 ,  H04N19/139 ,  H04N19/176 ,  H04N19/52 ,  H04N19/70

Abstract: Disclosed is a video signal processing method and device that encodes or decodes a video signal. In particular, the video signal processing method may comprise the steps of: parsing a first syntax element indicating whether a merge mode is applied to a current block; when the merge mode is applied to the current block, determining whether to parse a second syntax element on the basis of a first predefined condition, wherein the second syntax element indicates whether a first mode or a second mode is applied to the current block; when the first mode and the second mode are not applied to the current block, determining whether to parse a third syntax element on the basis of a second predefined condition; and determining a mode applied to the current block on the basis of the second syntax element or the third syntax element.

公开(公告)号：US20230308676A1

公开(公告)日：2023-09-28

申请号：US18328246

申请日：2023-06-02

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Geonjung KO ,  Dongcheol KIM ,  Juhyung SON ,  Jaehong JUNG ,  Jinsam KWAK

IPC: H04N19/513 ,  H04N19/53 ,  H04N19/57

CPC classification number: H04N19/513 ,  H04N19/53 ,  H04N19/57

Abstract: A video signal decoding device comprising a processor, wherein the processor is configured to: obtain reference samples corresponding to a first side of a current block and reference samples corresponding to a second side of the current block, obtain a direct current (DC) value for prediction of the current block based on a reference sample set comprising at least some of the reference samples corresponding to the first side and the reference samples corresponding to the second side, and reconstruct the current block based on the DC value.

公开(公告)号：US20220360786A1

公开(公告)日：2022-11-10

申请号：US17870809

申请日：2022-07-21

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Dongcheol KIM ,  Geonjung KO ,  Jaehong JUNG ,  Juhyung SON ,  Jinsam KWAK

IPC: H04N19/132 ,  H04N19/105 ,  H04N19/176 ,  H04N19/186

Abstract: The video signal processing method comprises the steps of: downsampling luma components of reconstructed blocks adjacent to a current block; acquiring a maximum luma value from among the downsampled luma components based on a first index; acquiring a next-highest maximum luma value from among the downsampled luma components based on a second index; acquiring a maximum average luma value based on an average value of the maximum luma value and the next-highest maximum luma value; acquiring a next-lowest minimum luma value from among the downsampled luma components based on a third index; acquiring a minimum luma value from among the downsampled luma components based on a fourth index; and acquiring a minimum average luma value based on the next-lowest minimum luma value and the minimum luma value.

公开(公告)号：US20220239948A1

公开(公告)日：2022-07-28

申请号：US17716956

申请日：2022-04-08

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC. ,  HUMAX CO., LTD.

Inventor： Jaehong JUNG ,  Juhyung SON ,  Dongcheol KIM ,  Geonjung KO ,  Jinsam KWAK

IPC: H04N19/61 ,  H04N19/132 ,  H04N19/176 ,  H04N19/18 ,  H04N19/70

Abstract: A video signal decoding apparatus, comprising a processor, wherein the processor is configured to: parse a syntax element related to a secondary transform of a coding unit based on whether a prediction method of the coding unit is MIP (Matrix based Intra Prediction), check whether or not the secondary transform is applied to a transform block included in the coding unit based on the parsed syntax element, obtain one or more inverse transform coefficients based on an inverse transform of the secondary transform when the secondary transform is applied to the transform block, obtain a residual sample for the transform block based on the one or more inverse transform coefficients.