公开(公告)号：US09621485B2

公开(公告)日：2017-04-11

申请号：US14858486

申请日：2015-09-18

Applicant: Wistron NeWeb Corp.

Inventor： Chung-Hua Chuang ,  Chun-Muh Tsai

IPC: H04L12/931

CPC classification number: H04L49/40

Abstract: The present invention provides a circuit including a multiplexer, a level-shifter circuit, a power-supply circuit, and a switch circuit. The multiplexer has a first input-terminal, a second input-terminal and a third input-terminal, wherein the first and second input-terminals are coupled to a first-interface pin and a second-interface transfer pin of a processor, and the third input-terminal is coupled to a second-interface receive pin or the first-interface pin of the processor. The level shifter circuit converts signals on the second input-terminal of the multiplexer and the signal receiving terminal of a shared-socket. The power-supply circuit couples a first power-source to the signal outputting terminal. The switch circuit couples the signal receiving terminal of the shared-socket to the third input-terminal of the multiplexer.