公开(公告)号：US20140061951A1

公开(公告)日：2014-03-06

申请号：US13756543

申请日：2013-02-01

Applicant: ZHEN DING TECHNOLOGY CO., LTD.

Inventor： TAEKOO LEE

IPC: H01L23/48 ,  H01L21/50

CPC classification number: H01L23/48 ,  H01L21/4853 ,  H01L21/50 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method for manufacturing a package on package structure includes the step of: providing a package body comprising a first package device and a connection substrate, the first package device comprising a number of first solder pads, the connection substrate comprising a substrate main body and a number of first electrically conductive posts, the first electrically conductive posts spatially corresponding to and being connected to the first solder pads, and a solder paste printed on each first electrically conductive post; attaching a second device on the second surface of the connection substrate, thereby obtaining a stacked structure, the second package device comprising a number of second solder pads; and solidifying the solder paste on each first electrically conductive post, such that each second solder pad is soldered to the corresponding first electrically conductive post using the solder paste, thereby obtaining a package on package structure.

Abstract translation: 一种用于制造封装结构的封装的方法包括以下步骤：提供包括第一封装器件和连接衬底的封装体，所述第一封装器件包括多个第一焊盘，所述连接衬底包括衬底主体和 第一导电柱的数量，在空间上对应于并连接到第一焊盘的第一导电柱和印刷在每个第一导电柱上的焊膏; 在所述连接基板的所述第二表面上附接第二装置，从而获得堆叠结构，所述第二封装装置包括多个第二焊盘; 并且在每个第一导电柱上固化焊膏，使得使用焊膏将每个第二焊盘焊接到相应的第一导电柱，从而获得封装结构上的封装。

公开(公告)号：US20140353006A1

公开(公告)日：2014-12-04

申请号：US14153059

申请日：2014-01-12

Applicant: Zhen Ding Technology Co., Ltd.

Inventor： TAEKOO LEE

IPC: H05K3/46 ,  H05K1/18 ,  H05K1/02

CPC classification number: H05K1/186 ,  H05K1/188 ,  H05K3/007 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2203/0353

Abstract: A multilayer circuit board includes a wiring board, a first adhesive sheet, an electronic device, and a second adhesive sheet. The wiring board includes a first wiring layer and a second wiring layer. The first adhesive sheet is adjacent to the first wiring layer. The first adhesive sheet defines a second receiving hole. The second receiving hole and the first receiving hole cooperatively form a receiving cavity. The first adhesive sheet includes a supporting surface. The electronic device is received in the receiving cavity, and includes two electrodes. The second adhesive sheet is adjacent to the second wiring layer, and includes a bottom surface. The third wiring layer is formed on the supporting surface and contacts with the two electrodes. The fourth wiring layer is formed on the bottom surface.

Abstract translation: 多层电路板包括布线板，第一粘合片，电子装置和第二粘合片。 布线基板包括第一布线层和第二布线层。 第一粘合片与第一布线层相邻。 第一粘合片限定第二容纳孔。 第二接收孔和第一接收孔协作地形成接收腔。 第一粘合片包括支撑表面。 电子设备被容纳在接收腔中，并且包括两个电极。 第二粘合片与第二布线层相邻，并且包括底面。 第三布线层形成在支撑面上并与两个电极接触。 第四布线层形成在底面上。

公开(公告)号：US20140175646A1

公开(公告)日：2014-06-26

申请号：US14101352

申请日：2013-12-10

Applicant: Zhen Ding Technology Co., Ltd.

Inventor： TAEKOO LEE

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49816 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/5385 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2224/92225 ,  H01L2224/92242 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/19107 ,  H01L2924/014 ,  H01L2924/00

Abstract: An exemplary package substrate includes a package substrate, a first connection substrate, a first chip, a dielectric adhesive sheet, a second chip, and a second connection substrate. The package substrate includes many first and second electrical contact pads. The first connection substrate includes many third and fourth electrical contact pads. Each fourth electrical contact pad is electrically connected to one first electrical contact pad. The first chip includes many first electrode pads. Each first electrode pad is electrically connected to the corresponding third electrical contact pad. The second chip is connected to the first chip by the dielectric adhesive sheet, and includes many second electrode pads. The second connection substrate includes many fifth and sixth electrical contact pads. Each fifth electrical contact pad is electrically connected to one second electrode pad, and each sixth electrical contact pad is electrically connected to one second electrical contact pad.

Abstract translation: 示例性封装衬底包括封装衬底，第一连接衬底，第一芯片，电介质粘合片，第二芯片和第二连接衬底。 封装衬底包括许多第一和第二电接触焊盘。 第一连接衬底包括许多第三和第四电接触焊盘。 每个第四电接触焊盘电连接到一个第一电接触焊盘。 第一芯片包括许多第一电极焊盘。 每个第一电极焊盘电连接到相应的第三电接触焊盘。 第二芯片通过介电粘合片连接到第一芯片，并且包括许多第二电极焊盘。 第二连接衬底包括许多第五和第六电接触焊盘。 每个第五电接触焊盘电连接到一个第二电极焊盘，并且每个第六电接触焊盘电连接到一个第二电接触焊盘。

公开(公告)号：US20150136457A1

公开(公告)日：2015-05-21

申请号：US14150723

申请日：2014-01-08

Applicant: ZHEN DING TECHNOLOGY CO., LTD.

Inventor： TAEKOO LEE

IPC: H05K1/11 ,  H05K3/40 ,  H05K1/03

CPC classification number: H05K3/423 ,  H05K1/0306 ,  H05K3/007 ,  H05K3/421 ,  H05K3/427 ,  Y10T29/49165

Abstract: An interposer includes an insulating substrate, a photosensitive dielectric film, a conductive layer, and a conductive via. The insulating substrate includes a bottom surface and a top surface, and defines a receiving through hole extending through the bottom surface and the top surface. The photosensitive dielectric film is mounted on the bottom surface. The photosensitive dielectric film defines a through hole spatially corresponding to and communicating with the receiving through hole. The conductive layer is mounted on an end of the photosensitive dielectric film away from the insulating substrate. The conductive layer covers an end of the through hole.The conductive via is received in the receiving through hole and the through hole. The conductive via contacts and electrically connects to the conductive layer.

Abstract translation: 插入器包括绝缘基板，光敏介电膜，导电层和导电孔。 绝缘基板包括底表面和顶表面，并且限定了延伸穿过底表面和顶表面的接收通孔。 感光电介质膜安装在底面上。 感光电介质膜在空间上限定了与接收通孔对应并与其连通的通孔。 导电层安装在远离绝缘基片的光敏电介质膜的一端上。 导电层覆盖通孔的一端。 导电通孔被容纳在接收通孔和通孔中。 导电通孔接触并电连接到导电层。