公开(公告)号：US09130573B2

公开(公告)日：2015-09-08

申请号：US13780528

申请日：2013-02-28

Applicant: Sony Corporation

Inventor： Katsuaki Takahashi

IPC: H03D3/02 ,  H03L7/00 ,  H03J3/08 ,  H03L7/08 ,  H03L7/099 ,  H03L7/183 ,  H03D9/02 ,  H03D9/06 ,  H03D1/04

CPC classification number: H03L7/00 ,  H03D1/04 ,  H03D9/02 ,  H03D9/06 ,  H03J3/08 ,  H03J2200/08 ,  H03J2200/10 ,  H03L7/0805 ,  H03L7/099 ,  H03L7/183

Abstract: Disclosed herein is a signal processing apparatus including: a voltage-controlled oscillation block having a parameter high in correlation with a filter; a measuring block configured to measure an oscillation frequency of the voltage-controlled oscillation block; and a control block configured to control the parameter of the filter by use of a measuring result of the oscillation frequency obtained by the measuring block.

Abstract translation: 这里公开了一种信号处理装置，包括：具有与滤波器相关的高参数的压控振荡块; 测量块，被配置为测量所述压控振荡块的振荡频率; 以及控制块，其被配置为通过使用由所述测量块获得的振荡频率的测量结果来控制所述滤波器的参数。

公开(公告)号：US08890633B2

公开(公告)日：2014-11-18

申请号：US13719011

申请日：2012-12-18

Applicant: NXP B.V.

Inventor： Sven Simons

IPC: H03B5/08 ,  H03L5/00 ,  H03J1/00 ,  H03J3/20 ,  H03J3/08 ,  H03J3/24 ,  H03B5/10 ,  H03B1/00

CPC classification number: H03L5/00 ,  H03B1/00 ,  H03B5/10 ,  H03J1/0008 ,  H03J3/08 ,  H03J3/20 ,  H03J3/24 ,  H03J2200/28

Abstract: According to an example embodiment, a device includes a resonant circuit configured and arranged to provide a peak current flow at a resonance frequency. A trimming circuit provides variable impedances to the resonant circuit and thereby changes the resonance frequency for the resonant circuit. A driver circuit is configured to generate a trimming signal that oscillates at a desired frequency. A switch circuit couples and decouples the driver circuit to the resonant circuit for driving the resonant circuit with the trimming signal. An amplitude detection circuit detects amplitudes for signals generated in response to the trimming signal being connected to the resonant circuit. A processing circuit correlates detected amplitudes from the amplitude detection circuit with different impedance values of the variable trimming circuit.

Abstract translation: 根据示例性实施例，一种器件包括谐振电路，其被配置和布置成以谐振频率提供峰值电流。 修整电路为谐振电路提供可变阻抗，从而改变谐振电路的谐振频率。 驱动器电路被配置为产生以所需频率振荡的微调信号。 开关电路将驱动电路耦合到谐振电路并将其去耦，以用修整信号来驱动谐振电路。 振幅检测电路检测响应于连接到谐振电路的修整信号而产生的信号的幅度。 处理电路使来自振幅检测电路的检测振幅与可变微调电路的不同阻抗值相关。

公开(公告)号：US08725098B2

公开(公告)日：2014-05-13

申请号：US12954925

申请日：2010-11-29

Applicant: Osama K A Shana'a ,  Xu-Dong Jiang ,  Chin-Heng Leow

Inventor： Osama K A Shana'a ,  Xu-Dong Jiang ,  Chin-Heng Leow

IPC: H04B1/18

CPC classification number: H03H7/40 ,  H03J3/08 ,  H03J2200/06 ,  H03J2200/08

Abstract: A radio-frequency (RF) front-end circuit includes a tunable filter, a negative transconductance circuit coupled with the tunable filter to produce a tuning oscillation signal, and a counter arranged to determine a frequency of the tuning oscillation signal. The RF front-end circuit also includes a control circuit arranged to shift the frequency of the tuning oscillation signal by adjusting the tunable filter until the frequency of the tuning oscillation signal falls within an acceptable frequency range corresponding to a desired channel frequency band.

Abstract translation: 射频（RF）前端电路包括可调谐滤波器，与可调谐滤波器耦合的负跨导电路以产生调谐振荡信号，以及被配置为确定调谐振荡信号的频率的计数器。 RF前端电路还包括控制电路，其被布置为通过调整可调谐滤波器来移动调谐振荡信号的频率，直到调谐振荡信号的频率落入对应于期望的信道频带的可接受的频率范围内。

公开(公告)号：US08233864B2

公开(公告)日：2012-07-31

申请号：US13064050

申请日：2011-03-03

Applicant: Hitoshi Tomiyama

Inventor： Hitoshi Tomiyama

IPC: H04B1/18

CPC classification number: H03J3/08

Abstract: Disclosed herein is a signal receiving apparatus including: a resonance section configured to receive an input signal at a variable resonance frequency; a signal supplying section configured to supply an electrical signal having a desired reception frequency to the resonance section; a mixture section configured to mix a resonance signal, which is output by the resonance section when the resonance section receives the electrical signal from the signal supplying section, with a switching signal having the desired reception frequency; and a control section configured to change a resonance characteristic of the resonance section and measure the phases of mixed signals output by the mixture section before and after the resonance characteristic changing operation to control the resonance frequency of the resonance section in order to change the resonance frequency in a direction to reduce a difference between the phases of the mixed signals before and after the resonance characteristic changing operation.

Abstract translation: 这里公开了一种信号接收装置，包括：谐振部分，被配置为接收可变谐振频率的输入信号; 信号供给部，被配置为向所述共振部供给具有期望接收频率的电信号; 混合部，被配置为混合当所述谐振部从所述信号提供部接收到所述电信号时由所述谐振部输出的谐振信号与具有期望接收频率的切换信号混合; 以及控制部，其被配置为改变所述谐振部的谐振特性，并且测量所述谐振特性改变操作之前和之后由所述混合部输出的混合信号的相位，以控制所述谐振部的谐振频率，以便改变谐振频率 在减小谐振特性变化操作之前和之后的混合信号的相位之间的差的方向上。

公开(公告)号：US08195117B2

公开(公告)日：2012-06-05

申请号：US12789928

申请日：2010-05-28

Applicant: Klaas Bult ,  Ramon A. Gomez

Inventor： Klaas Bult ,  Ramon A. Gomez

IPC: H04B1/06 ,  H04K3/00

CPC classification number: H03D3/18 ,  H01F17/0006 ,  H01F17/0013 ,  H01F27/34 ,  H01F27/40 ,  H01F27/42 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/0251 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/04 ,  H03B5/364 ,  H03D7/161 ,  H03D7/18 ,  H03F1/26 ,  H03F1/3211 ,  H03F3/195 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2200/447 ,  H03F2200/63 ,  H03F2203/45264 ,  H03F2203/45286 ,  H03G1/0023 ,  H03G1/0029 ,  H03G3/3052 ,  H03H7/25 ,  H03H11/04 ,  H03H11/1291 ,  H03H11/53 ,  H03H11/54 ,  H03H19/004 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L7/10 ,  H03L7/183 ,  H03L7/23 ,  H03L2207/06 ,  H01L2924/00

Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver.

Abstract translation: 描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合，以提供足够的图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 滤波器采用多轨螺旋电感。 使用本地振荡器调整滤波器以调整替代滤波器，以及滤波器组件值期间的频率缩放与被调谐的滤波器的频率缩放。 结合滤波，频率规划提供了额外的镜像抑制。 片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中，使调谐电容范围居中。 差分晶体振荡器有利地用作频率参考。 差分信号传输有利地用于整个接收机。

公开(公告)号：US08150351B2

公开(公告)日：2012-04-03

申请号：US12297175

申请日：2007-04-16

Applicant: Peter Shah ,  Bert Fransis ,  Keith Bargroff

Inventor： Peter Shah ,  Bert Fransis ,  Keith Bargroff

IPC: H03J3/08

CPC classification number: H03J3/08 ,  H03J2200/08 ,  H03J2200/18

Abstract: A broadband tuner includes a tracking filter with calibration to compensate for component errors and drift. The filters use off-die inductors that are preferably within a system-in-package (SIP) with other critical tuner components, which produces a highly integrated tuner front end with high Q filters within a single package. High voltage varactors with a large tuning range can be used for variable capacitors. The integration of the tuner into a SIP allows the tuner design to be optimized for cost and performance while keeping the critical RF layout requirements within the tuner. A configurable tuner front end enables modes for low noise, high linearity, good input return loss (S11) across the entire RF band, and applying a test tone in the calibration mode. The switchable mode enables the tuner to be effective during weak terrestrial reception, strong terrestrial reception, and connection to a cable plant.

Abstract translation: 宽带调谐器包括具有校准以补偿组件误差和漂移的跟踪滤波器。 滤波器使用优选地在具有其他关键调谐器组件的系统级封装（SIP）内的片外电感器，其在单个封装内产生具有高Q滤波器的高度集成的调谐器前端。 具有较大调谐范围的高压变容二极管可用于可变电容器。 将调谐器集成到SIP中可以使调谐器设计针对成本和性能进行优化，同时保持调谐器内的关键RF布局要求。 可配置的调谐器前端可以实现整个RF频段的低噪声，高线性度，良好的输入回波损耗（S11），以及在校准模式下应用测试音调的模式。 可切换模式使得调谐器在弱地面接收，强大的地面接收和与电缆厂的连接方面是有效的。

公开(公告)号：US08111095B2

公开(公告)日：2012-02-07

申请号：US11522454

申请日：2006-09-18

Applicant: Pieter Vorenkamp ,  Klaas Bult ,  Frank Carr

Inventor： Pieter Vorenkamp ,  Klaas Bult ,  Frank Carr

IPC: H03K5/00

CPC classification number: H03D3/18 ,  H01F17/0006 ,  H01F17/0013 ,  H01F27/34 ,  H01F27/40 ,  H01F27/42 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/0251 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/04 ,  H03B5/364 ,  H03D7/161 ,  H03D7/18 ,  H03F1/26 ,  H03F1/3211 ,  H03F3/195 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2200/447 ,  H03F2200/63 ,  H03F2203/45264 ,  H03F2203/45286 ,  H03G1/0023 ,  H03G1/0029 ,  H03G3/3052 ,  H03H7/25 ,  H03H11/04 ,  H03H11/1291 ,  H03H11/53 ,  H03H11/54 ,  H03H19/004 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L7/10 ,  H03L7/183 ,  H03L7/23 ,  H03L2207/06 ,  H01L2924/00

Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver.

Abstract translation: 描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合，以提供足够的图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 滤波器采用多轨螺旋电感。 使用本地振荡器调整滤波器以调整替代滤波器，以及滤波器组件值期间的频率缩放与被调谐的滤波器的频率缩放。 结合滤波，频率规划提供了额外的镜像抑制。 片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中，使调谐电容范围居中。 差分晶体振荡器有利地用作频率参考。 差分信号传输有利地用于整个接收机。

公开(公告)号：US08045066B2

公开(公告)日：2011-10-25

申请号：US12883575

申请日：2010-09-16

Applicant: Pieter Vorenkamp ,  Klaas Bult ,  Frank Carr ,  Christopher M. Ward ,  Ralph Duncan ,  Tom W. Kwan ,  James Y. C. Chang ,  Haideh Khorramabadi

Inventor： Pieter Vorenkamp ,  Klaas Bult ,  Frank Carr ,  Christopher M. Ward ,  Ralph Duncan ,  Tom W. Kwan ,  James Y. C. Chang ,  Haideh Khorramabadi

IPC: H04N5/455 ,  H04N5/44

CPC classification number: H03D3/18 ,  H01F17/0006 ,  H01F17/0013 ,  H01F27/34 ,  H01F27/40 ,  H01F27/42 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/0251 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/04 ,  H03B5/364 ,  H03D7/161 ,  H03D7/18 ,  H03F1/26 ,  H03F1/3211 ,  H03F3/195 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2200/447 ,  H03F2200/63 ,  H03F2203/45264 ,  H03F2203/45286 ,  H03G1/0023 ,  H03G1/0029 ,  H03G3/3052 ,  H03H7/25 ,  H03H11/04 ,  H03H11/1291 ,  H03H11/53 ,  H03H11/54 ,  H03H19/004 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L7/10 ,  H03L7/183 ,  H03L7/23 ,  H03L2207/06 ,  H01L2924/00

Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver.

Abstract translation: 描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合，以提供足够的图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 滤波器采用多轨螺旋电感。 使用本地振荡器调整滤波器以调整替代滤波器，以及滤波器组件值期间的频率缩放与被调谐的滤波器的频率缩放。 结合滤波，频率规划提供了额外的镜像抑制。 片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中，使调谐电容范围居中。 差分晶体振荡器有利地用作频率参考。 差分信号传输有利地用于整个接收机。

公开(公告)号：US20110098007A1

公开(公告)日：2011-04-28

申请号：US11817792

申请日：2006-03-02

Applicant: Olivier Charlon

Inventor： Olivier Charlon

IPC: H04B1/40

CPC classification number: H03J3/08 ,  H03J1/0008

Abstract: Systems and methods according to the present invention address this need and others by providing filter tuning methods and apparatuses which directly measure filter attenuation by transmitting signaling tones through the filter(s). The measured attenuation is compared with the desired frequency response of the filter. The result of the comparison is used to tune the filter(s).

Abstract translation: 根据本发明的系统和方法通过提供通过发送信令音通过滤波器来直接测量滤波器衰减的滤波器调谐方法和装置来满足这种需要和其他需求。 将测量的衰减与滤波器的期望频率响应进行比较。 比较结果用于调整滤波器。

公开(公告)号：US07840196B2

公开(公告)日：2010-11-23

申请号：US11534069

申请日：2006-09-21

Applicant: Hiroyuki Kayano

Inventor： Hiroyuki Kayano

IPC: H01Q11/12 ,  H04B1/18 ,  H04B17/00 ,  H01P7/00

CPC classification number: H04B1/0057 ,  H03J3/08

Abstract: In a filter circuit, resonators is connected in parallel between input and output terminal, an input signal is input through the input terminal and supplied to the resonators. Signal generators are connected to the resonators to control the resonators. The signal generators are controlled by a control unit so that the resonators are resonated to generate resonance signals at different resonant frequencies and at predetermined resonance phases. Thus, the output signal is set within a desired frequency range.

Abstract translation: 在滤波电路中，谐振器并联在输入和输出端之间，输入信号通过输入端输入并提供给谐振器。 信号发生器连接到谐振器以控制谐振器。 信号发生器由控制单元控制，使得谐振器被谐振以在不同谐振频率和预定谐振阶段产生谐振信号。 因此，将输出信号设定在期望的频率范围内。