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CN102822963A 利用无芯封装件形成用于电磁干扰屏蔽的金属填充的管芯背侧薄膜 有权

  • Patent Title: 利用无芯封装件形成用于电磁干扰屏蔽的金属填充的管芯背侧薄膜
  • Patent Title (English): Forming metal filled die back-side film for electromagnetic interference shielding with coreless packages
  • Application No.: CN201180017635.7
    Application Date: 2011-04-04
  • Publication No.: CN102822963A
    Publication Date: 2012-12-12
  • Inventor: R·K·纳拉 , D·德莱尼
  • Applicant: 英特尔公司
  • Applicant Address: 美国加利福尼亚州
  • Assignee: 英特尔公司
  • Current Assignee: 英特尔公司
  • Current Assignee Address: 美国加利福尼亚州
  • Agency: 上海专利商标事务所有限公司
  • Agent 钱慰民
  • Priority: 12/755,201 2010.04.06 US
  • International Application: PCT/US2011/031079 2011.04.04
  • International Announcement: WO2011/126973 EN 2011.10.13
  • Date entered country: 2012-09-27
  • Main IPC: H01L23/48
  • IPC: H01L23/48 ;  H01L21/60
利用无芯封装件形成用于电磁干扰屏蔽的金属填充的管芯背侧薄膜
Abstract:
记载了一种形成微电子封装结构的方法和由此形成的相关结构。这些方法可包括：在载体材料内形成空腔；将管芯附连在空腔内，其中管芯的背侧包括金属填充的DBF；在管芯附近和载体材料的底侧上形成介电材料；通过在介电材料上堆积多个层来形成无芯衬底；并从无芯衬底去除载体材料。
Abstract(English):

Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a cavity in a carrier material, attaching a die in the cavity, wherein a backside of the die comprises a metal filled DBF, forming a dielectric material adjacent the die and on a bottom side of the carrier material, forming a coreless substrate by building up layers on the dielectric material, and removing the carrier material from the coreless substrate.

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