Invention Grant
- Patent Title: Method and apparatus for a highly efficient graphics processing unit (GPU) execution model
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Application No.: US14498220Application Date: 2014-09-26
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Publication No.: US10521874B2Publication Date: 2019-12-31
- Inventor: Jayanth N. Rao , Pavan K. Lanka , Michal Mrozek
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Webster & Elliott LLP
- Main IPC: G06T1/20
- IPC: G06T1/20 ; G06T1/60

Abstract:
An apparatus and method are described for executing workloads without host intervention. For example, one embodiment of an apparatus comprises: a host processor; and a graphics processor unit (GPU) to execute a hierarchical workload responsive to one or more commands issued by the host processor, the hierarchical workload comprising a parent workload and a plurality of child workloads interconnected in a logical graph structure; and a scheduler kernel implemented by the GPU to schedule execution of the plurality of child workloads without host intervention, the scheduler kernel to evaluate conditions required for execution of the child workloads and determine an order in which to execute the child workloads on the GPU based on the evaluated conditions; the GPU to execute the child workloads in the order determined by the scheduler kernel and to provide results of parent and child workloads to the host processor following execution of all of the child workloads.
Public/Granted literature
- US20160093012A1 METHOD AND APPARATUS FOR A HIGHLY EFFICIENT GRAPHICS PROCESSING UNIT (GPU) EXECUTION MODEL Public/Granted day:2016-03-31
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