Invention Grant
- Patent Title: Delay circuit with dual delay resolution regime
-
Application No.: US15496924Application Date: 2017-04-25
-
Publication No.: US10594306B2Publication Date: 2020-03-17
- Inventor: Marc Péralte Dandin
- Applicant: KISKEYA MICROSYSTEMS LLC
- Applicant Address: US MD Rockville
- Assignee: KISKEYA MICROSYSTEMS LLC
- Current Assignee: KISKEYA MICROSYSTEMS LLC
- Current Assignee Address: US MD Rockville
- Main IPC: H03K5/134
- IPC: H03K5/134 ; H01L31/02 ; H01L31/107 ; H03H11/26 ; H03K17/74 ; G01J1/44 ; H03K5/1534 ; H03K5/00 ; H03K5/133

Abstract:
A delay circuit is provided. The delay circuit includes a first regulator and a second regulator, each of which is independently selectable based on a selection signal applied to a selection terminal of the delay circuit. Furthermore, the delay circuit is configurable in one of two distinct delay resolution regimes, each corresponding to only one edge an input signal being actively delayed by the delay circuit when one of the first regulator and the second regulator is enabled and the other one of the first regulator and the second regulator is turned off.
Public/Granted literature
- US20170230037A1 DELAY CIRCUIT WITH DUAL DELAY RESOLUTION REGIME Public/Granted day:2017-08-10
Information query
IPC分类: