Invention Grant
- Patent Title: Monolithic silicon bridge stack including a hybrid baseband die supporting processors and memory
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Application No.: US16515979Application Date: 2019-07-18
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Publication No.: US11018114B2Publication Date: 2021-05-25
- Inventor: Bernd Waidhas , Georg Seidemann , Andreas Augustin , Laurent Millou , Andreas Wolter , Reinhard Mahnkopf , Stephan Stoeckl , Thomas Wagner
- Applicant: Intel IP Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel IP Corporation
- Current Assignee: Intel IP Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H01L25/10
- IPC: H01L25/10 ; H01L25/065 ; H01L21/48 ; H01L23/48 ; H01L25/00 ; H01L23/427 ; G06F15/76

Abstract:
A semiconductive device stack, includes a baseband processor die with an active surface and a backside surface, and a recess in the backside surface. A recess-seated device is disposed in the recess, and a through-silicon via in the baseband processor die couples the baseband processor die at the active surface to the recess-seated die at the recess. A processor die is disposed on the baseband processor die backside surface, and a memory die is disposed on the processor die. The several dice are coupled by through-silicon via groups.
Public/Granted literature
- US20190341371A1 MONOLITHIC SILICON BRIDGE STACK INCLUDING A HYBRID BASEBAND DIE SUPPORTING PROCESSORS AND MEMORY Public/Granted day:2019-11-07
Information query
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