Invention Grant
- Patent Title: Dual gate control for trench shaped thin film transistors
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Application No.: US15938153Application Date: 2018-03-28
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Publication No.: US11183594B2Publication Date: 2021-11-23
- Inventor: Abhishek A. Sharma , Van H. Le , Gilbert Dewey , Jack T. Kavalieros , Shriram Shivaraman , Benjamin Chu-Kung , Yih Wang , Tahir Ghani
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Green, Howard & Mughal LLP
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L29/08 ; H01L29/04 ; H01L27/108 ; H01L29/66 ; H01L29/10 ; H01L21/02 ; H01L29/423 ; H01L21/311
Abstract:
Disclosed herein are dual gate trench shaped thin film transistors and related methods and devices. Exemplary thin film transistor structures include a non-planar semiconductor material layer having a first portion extending laterally over a first gate dielectric layer, which is over a first gate electrode structure, and a second portion extending along a trench over the first gate dielectric layer, a second gate electrode structure at least partially within the trench, and a second gate dielectric layer between the second gate electrode structure and the first portion.
Public/Granted literature
- US20190305137A1 DUAL GATE CONTROL FOR TRENCH SHAPED THIN FILM TRANSISTORS Public/Granted day:2019-10-03
Information query
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