Invention Grant
- Patent Title: Three-dimensional laminated integrated circuit
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Application No.: US16932838Application Date: 2020-07-20
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Publication No.: US11244887B2Publication Date: 2022-02-08
- Inventor: Takashi Tsutsui , Shigenori Imanaka , Tomohiko Furutani
- Applicant: SoftBank Corp.
- Applicant Address: JP Tokyo
- Assignee: SoftBank Corp.
- Current Assignee: SoftBank Corp.
- Current Assignee Address: JP Tokyo
- Main IPC: H01L23/44
- IPC: H01L23/44 ; H01L23/32 ; H01L23/473 ; H01L25/18

Abstract:
A three-dimensional stacked integrated circuit includes a plurality of interposers between respective integrated circuits of the three-dimensional stacked integrated circuit and below a lowermost integrated circuit, wherein a plurality of movement paths of a coolant are respectively provided in the plurality of interposers, and the plurality of movement paths of the coolant provided in the plurality of interposers are connected to each other. Alternatively, the three-dimensional stacked integrated circuit is configured by immersion and the system thereof is simplified by the coolant interacting with the outside in grooves provided to the edges of the interposers. In this case, a path for allowing the coolant to flow in the layer direction is not necessary.
Information query
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