Invention Grant
- Patent Title: Vertical thyristor
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Application No.: US16706201Application Date: 2019-12-06
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Publication No.: US11362204B2Publication Date: 2022-06-14
- Inventor: Samuel Menard , Lionel Jaouen
- Applicant: STMicroelectronics (Tours) SAS
- Applicant Address: FR Tours
- Assignee: STMicroelectronics (Tours) SAS
- Current Assignee: STMicroelectronics (Tours) SAS
- Current Assignee Address: FR Tours
- Agency: Crowe & Dunlevy
- Priority: FR1873566 20181220
- Main IPC: H01L29/74
- IPC: H01L29/74 ; H01L29/749 ; H01L29/06 ; H01L29/08

Abstract:
A thyristor is formed from a vertical stack of first, second, third, and fourth semiconductor regions of alternated conductivity types. The fourth semiconductor region is interrupted in a gate area of the thyristor. The fourth semiconductor region is further interrupted in a continuous corridor that extends longitudinally from the gate area towards an outer lateral edge of the fourth semiconductor region. A gate metal layer extends over the gate area of the thyristor. A cathode metal layer extends over the fourth semiconductor region but not over the continuous corridor.
Information query
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